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f8c6137016
This does not implement all opcodes related to div/sqrt as specified in the xtensa ISA, partly because the official specification is not complete and partly because precise implementation is unnecessarily complex. Instead instructions specific to the div/sqrt sequences are implemented differently, most of them as nops, but the results of div/sqrt sequences is preserved. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
449 lines
13 KiB
C
449 lines
13 KiB
C
/*
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* Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/main-loop.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "qemu/host-utils.h"
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#include "exec/exec-all.h"
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#include "fpu/softfloat.h"
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enum {
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XTENSA_FP_I = 0x1,
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XTENSA_FP_U = 0x2,
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XTENSA_FP_O = 0x4,
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XTENSA_FP_Z = 0x8,
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XTENSA_FP_V = 0x10,
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};
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enum {
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XTENSA_FCR_FLAGS_SHIFT = 2,
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XTENSA_FSR_FLAGS_SHIFT = 7,
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};
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static const struct {
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uint32_t xtensa_fp_flag;
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int softfloat_fp_flag;
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} xtensa_fp_flag_map[] = {
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{ XTENSA_FP_I, float_flag_inexact, },
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{ XTENSA_FP_U, float_flag_underflow, },
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{ XTENSA_FP_O, float_flag_overflow, },
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{ XTENSA_FP_Z, float_flag_divbyzero, },
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{ XTENSA_FP_V, float_flag_invalid, },
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};
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void HELPER(wur_fpu2k_fcr)(CPUXtensaState *env, uint32_t v)
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{
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static const int rounding_mode[] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down,
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};
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env->uregs[FCR] = v & 0xfffff07f;
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set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
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}
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void HELPER(wur_fpu_fcr)(CPUXtensaState *env, uint32_t v)
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{
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static const int rounding_mode[] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down,
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};
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if (v & 0xfffff000) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"MBZ field of FCR is written non-zero: %08x\n", v);
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}
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env->uregs[FCR] = v & 0x0000007f;
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set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
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}
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void HELPER(wur_fpu_fsr)(CPUXtensaState *env, uint32_t v)
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{
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uint32_t flags = v >> XTENSA_FSR_FLAGS_SHIFT;
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int fef = 0;
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unsigned i;
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if (v & 0xfffff000) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"MBZ field of FSR is written non-zero: %08x\n", v);
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}
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env->uregs[FSR] = v & 0x00000f80;
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for (i = 0; i < ARRAY_SIZE(xtensa_fp_flag_map); ++i) {
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if (flags & xtensa_fp_flag_map[i].xtensa_fp_flag) {
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fef |= xtensa_fp_flag_map[i].softfloat_fp_flag;
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}
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}
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set_float_exception_flags(fef, &env->fp_status);
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}
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uint32_t HELPER(rur_fpu_fsr)(CPUXtensaState *env)
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{
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uint32_t flags = 0;
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int fef = get_float_exception_flags(&env->fp_status);
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unsigned i;
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for (i = 0; i < ARRAY_SIZE(xtensa_fp_flag_map); ++i) {
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if (fef & xtensa_fp_flag_map[i].softfloat_fp_flag) {
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flags |= xtensa_fp_flag_map[i].xtensa_fp_flag;
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}
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}
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env->uregs[FSR] = flags << XTENSA_FSR_FLAGS_SHIFT;
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return flags << XTENSA_FSR_FLAGS_SHIFT;
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}
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float64 HELPER(abs_d)(float64 v)
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{
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return float64_abs(v);
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}
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float32 HELPER(abs_s)(float32 v)
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{
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return float32_abs(v);
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}
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float64 HELPER(neg_d)(float64 v)
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{
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return float64_chs(v);
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}
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float32 HELPER(neg_s)(float32 v)
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{
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return float32_chs(v);
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}
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float32 HELPER(fpu2k_add_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_add(a, b, &env->fp_status);
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}
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float32 HELPER(fpu2k_sub_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_sub(a, b, &env->fp_status);
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}
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float32 HELPER(fpu2k_mul_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_mul(a, b, &env->fp_status);
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}
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float32 HELPER(fpu2k_madd_s)(CPUXtensaState *env,
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float32 a, float32 b, float32 c)
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{
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return float32_muladd(b, c, a, 0, &env->fp_status);
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}
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float32 HELPER(fpu2k_msub_s)(CPUXtensaState *env,
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float32 a, float32 b, float32 c)
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{
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return float32_muladd(b, c, a, float_muladd_negate_product,
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&env->fp_status);
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}
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float64 HELPER(add_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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set_use_first_nan(true, &env->fp_status);
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return float64_add(a, b, &env->fp_status);
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}
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float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_add(a, b, &env->fp_status);
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}
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float64 HELPER(sub_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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set_use_first_nan(true, &env->fp_status);
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return float64_sub(a, b, &env->fp_status);
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}
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float32 HELPER(sub_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_sub(a, b, &env->fp_status);
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}
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float64 HELPER(mul_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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set_use_first_nan(true, &env->fp_status);
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return float64_mul(a, b, &env->fp_status);
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}
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float32 HELPER(mul_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_mul(a, b, &env->fp_status);
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}
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float64 HELPER(madd_d)(CPUXtensaState *env, float64 a, float64 b, float64 c)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float64_muladd(b, c, a, 0, &env->fp_status);
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}
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float32 HELPER(madd_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_muladd(b, c, a, 0, &env->fp_status);
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}
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float64 HELPER(msub_d)(CPUXtensaState *env, float64 a, float64 b, float64 c)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float64_muladd(b, c, a, float_muladd_negate_product,
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&env->fp_status);
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}
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float32 HELPER(msub_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_muladd(b, c, a, float_muladd_negate_product,
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&env->fp_status);
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}
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float64 HELPER(mkdadj_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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set_use_first_nan(true, &env->fp_status);
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return float64_div(b, a, &env->fp_status);
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}
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float32 HELPER(mkdadj_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_div(b, a, &env->fp_status);
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}
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float64 HELPER(mksadj_d)(CPUXtensaState *env, float64 v)
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{
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set_use_first_nan(true, &env->fp_status);
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return float64_sqrt(v, &env->fp_status);
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}
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float32 HELPER(mksadj_s)(CPUXtensaState *env, float32 v)
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{
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set_use_first_nan(env->config->use_first_nan, &env->fp_status);
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return float32_sqrt(v, &env->fp_status);
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}
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uint32_t HELPER(ftoi_d)(CPUXtensaState *env, float64 v,
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uint32_t rounding_mode, uint32_t scale)
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{
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float_status fp_status = env->fp_status;
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uint32_t res;
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set_float_rounding_mode(rounding_mode, &fp_status);
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res = float64_to_int32(float64_scalbn(v, scale, &fp_status), &fp_status);
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set_float_exception_flags(get_float_exception_flags(&fp_status),
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&env->fp_status);
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return res;
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}
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uint32_t HELPER(ftoi_s)(CPUXtensaState *env, float32 v,
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uint32_t rounding_mode, uint32_t scale)
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{
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float_status fp_status = env->fp_status;
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uint32_t res;
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set_float_rounding_mode(rounding_mode, &fp_status);
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res = float32_to_int32(float32_scalbn(v, scale, &fp_status), &fp_status);
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set_float_exception_flags(get_float_exception_flags(&fp_status),
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&env->fp_status);
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return res;
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}
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uint32_t HELPER(ftoui_d)(CPUXtensaState *env, float64 v,
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uint32_t rounding_mode, uint32_t scale)
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{
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float_status fp_status = env->fp_status;
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float64 res;
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uint32_t rv;
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set_float_rounding_mode(rounding_mode, &fp_status);
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res = float64_scalbn(v, scale, &fp_status);
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if (float64_is_neg(v) && !float64_is_any_nan(v)) {
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set_float_exception_flags(float_flag_invalid, &fp_status);
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rv = float64_to_int32(res, &fp_status);
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} else {
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rv = float64_to_uint32(res, &fp_status);
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}
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set_float_exception_flags(get_float_exception_flags(&fp_status),
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&env->fp_status);
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return rv;
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}
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uint32_t HELPER(ftoui_s)(CPUXtensaState *env, float32 v,
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uint32_t rounding_mode, uint32_t scale)
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{
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float_status fp_status = env->fp_status;
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float32 res;
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uint32_t rv;
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set_float_rounding_mode(rounding_mode, &fp_status);
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res = float32_scalbn(v, scale, &fp_status);
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if (float32_is_neg(v) && !float32_is_any_nan(v)) {
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rv = float32_to_int32(res, &fp_status);
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if (rv) {
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set_float_exception_flags(float_flag_invalid, &fp_status);
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}
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} else {
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rv = float32_to_uint32(res, &fp_status);
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}
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set_float_exception_flags(get_float_exception_flags(&fp_status),
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&env->fp_status);
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return rv;
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}
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float64 HELPER(itof_d)(CPUXtensaState *env, uint32_t v, uint32_t scale)
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{
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return float64_scalbn(int32_to_float64(v, &env->fp_status),
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(int32_t)scale, &env->fp_status);
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}
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float32 HELPER(itof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
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{
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return float32_scalbn(int32_to_float32(v, &env->fp_status),
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(int32_t)scale, &env->fp_status);
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}
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float64 HELPER(uitof_d)(CPUXtensaState *env, uint32_t v, uint32_t scale)
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{
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return float64_scalbn(uint32_to_float64(v, &env->fp_status),
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(int32_t)scale, &env->fp_status);
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}
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float32 HELPER(uitof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
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{
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return float32_scalbn(uint32_to_float32(v, &env->fp_status),
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(int32_t)scale, &env->fp_status);
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}
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float64 HELPER(cvtd_s)(CPUXtensaState *env, float32 v)
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{
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return float32_to_float64(v, &env->fp_status);
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}
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float32 HELPER(cvts_d)(CPUXtensaState *env, float64 v)
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{
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return float64_to_float32(v, &env->fp_status);
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}
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uint32_t HELPER(un_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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return float64_unordered_quiet(a, b, &env->fp_status);
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}
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uint32_t HELPER(un_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_unordered_quiet(a, b, &env->fp_status);
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}
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uint32_t HELPER(oeq_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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return float64_eq_quiet(a, b, &env->fp_status);
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}
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uint32_t HELPER(oeq_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_eq_quiet(a, b, &env->fp_status);
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}
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uint32_t HELPER(ueq_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
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return v == float_relation_equal ||
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v == float_relation_unordered;
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}
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uint32_t HELPER(ueq_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
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return v == float_relation_equal ||
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v == float_relation_unordered;
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}
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uint32_t HELPER(olt_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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return float64_lt(a, b, &env->fp_status);
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}
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uint32_t HELPER(olt_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_lt(a, b, &env->fp_status);
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}
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uint32_t HELPER(ult_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
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return v == float_relation_less ||
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v == float_relation_unordered;
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}
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uint32_t HELPER(ult_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
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return v == float_relation_less ||
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v == float_relation_unordered;
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}
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uint32_t HELPER(ole_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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return float64_le(a, b, &env->fp_status);
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}
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uint32_t HELPER(ole_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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return float32_le(a, b, &env->fp_status);
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}
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uint32_t HELPER(ule_d)(CPUXtensaState *env, float64 a, float64 b)
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{
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FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
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return v != float_relation_greater;
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}
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uint32_t HELPER(ule_s)(CPUXtensaState *env, float32 a, float32 b)
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{
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FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
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return v != float_relation_greater;
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}
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