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To enable hotplugging of a newly created pcie-pci-bridge, we need to tell firmware (e.g. SeaBIOS) to reserve additional buses or IO/MEM/PREF space for pcie-root-port. Additional bus reservation allows us to hotplug pcie-pci-bridge into this root port. The number of buses and IO/MEM/PREF space to reserve are provided to the device via a corresponding property, and to the firmware via new PCI capability. The properties' default values are -1 to keep default behavior unchanged. Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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| .. | ||
| dec.c | ||
| dec.h | ||
| gen_pcie_root_port.c | ||
| i82801b11.c | ||
| ioh3420.c | ||
| ioh3420.h | ||
| Makefile.objs | ||
| pci_bridge_dev.c | ||
| pci_expander_bridge.c | ||
| pcie_pci_bridge.c | ||
| pcie_root_port.c | ||
| xio3130_downstream.c | ||
| xio3130_downstream.h | ||
| xio3130_upstream.c | ||
| xio3130_upstream.h | ||