mirror of
https://github.com/xemu-project/xemu.git
synced 2024-12-01 07:21:09 +00:00
96eacf6413
The arm_boot secondary boot loader code needs the address of the GIC CPU interface. Obtaining this from the base address of the private peripheral region was possible for A9 and 11MPcore, but the A15 puts the GIC CPU interface in a different place. So make boards pass in the GIC CPU interface address directly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
68 lines
2.3 KiB
C
68 lines
2.3 KiB
C
/*
|
|
* Misc ARM declarations
|
|
*
|
|
* Copyright (c) 2006 CodeSourcery.
|
|
* Written by Paul Brook
|
|
*
|
|
* This code is licensed under the LGPL.
|
|
*
|
|
*/
|
|
|
|
#ifndef ARM_MISC_H
|
|
#define ARM_MISC_H 1
|
|
|
|
#include "memory.h"
|
|
|
|
/* The CPU is also modeled as an interrupt controller. */
|
|
#define ARM_PIC_CPU_IRQ 0
|
|
#define ARM_PIC_CPU_FIQ 1
|
|
qemu_irq *arm_pic_init_cpu(CPUState *env);
|
|
|
|
/* armv7m.c */
|
|
qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
|
|
int flash_size, int sram_size,
|
|
const char *kernel_filename, const char *cpu_model);
|
|
|
|
/* arm_boot.c */
|
|
struct arm_boot_info {
|
|
int ram_size;
|
|
const char *kernel_filename;
|
|
const char *kernel_cmdline;
|
|
const char *initrd_filename;
|
|
target_phys_addr_t loader_start;
|
|
/* multicore boards that use the default secondary core boot functions
|
|
* need to put the address of the secondary boot code, the boot reg,
|
|
* and the GIC address in the next 3 values, respectively. boards that
|
|
* have their own boot functions can use these values as they want.
|
|
*/
|
|
target_phys_addr_t smp_loader_start;
|
|
target_phys_addr_t smp_bootreg_addr;
|
|
target_phys_addr_t gic_cpu_if_addr;
|
|
int nb_cpus;
|
|
int board_id;
|
|
int (*atag_board)(const struct arm_boot_info *info, void *p);
|
|
/* multicore boards that use the default secondary core boot functions
|
|
* can ignore these two function calls. If the default functions won't
|
|
* work, then write_secondary_boot() should write a suitable blob of
|
|
* code mimicing the secondary CPU startup process used by the board's
|
|
* boot loader/boot ROM code, and secondary_cpu_reset_hook() should
|
|
* perform any necessary CPU reset handling and set the PC for thei
|
|
* secondary CPUs to point at this boot blob.
|
|
*/
|
|
void (*write_secondary_boot)(CPUState *env,
|
|
const struct arm_boot_info *info);
|
|
void (*secondary_cpu_reset_hook)(CPUState *env,
|
|
const struct arm_boot_info *info);
|
|
/* Used internally by arm_boot.c */
|
|
int is_linux;
|
|
target_phys_addr_t initrd_size;
|
|
target_phys_addr_t entry;
|
|
};
|
|
void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
|
|
|
|
/* Multiplication factor to convert from system clock ticks to qemu timer
|
|
ticks. */
|
|
extern int system_clock_scale;
|
|
|
|
#endif /* !ARM_MISC_H */
|