xemu/gdb-xml
Andrew Burgess 4c0f0b6619 target/riscv: remove fixed numbering from GDB xml feature files
The fixed register numbering in the various GDB feature files for
RISC-V only exists because these files were originally copied from the
GDB source tree.

However, the fixed numbering only exists in the GDB source tree so
that GDB, when it connects to a target that doesn't provide a target
description, will use a specific numbering scheme.

That numbering scheme is designed to be compatible with the first
versions of QEMU (for RISC-V), that didn't send a target description,
and relied on a fixed numbering scheme.

Because of the way that QEMU manages its target descriptions,
recording the number of registers in each feature, and just relying on
GDB's numbering starting from 0, then I propose that we remove all the
fixed numbering from the RISC-V feature xml files, and just rely on
the standard numbering scheme.  Plenty of other targets manage their
xml files this way, e.g. ARM, AArch64, Loongarch, m68k, rx, and s390.

Signed-off-by: Andrew Burgess <aburgess@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Message-Id: <6069395f90e6fc24dac92197be815fedf42f5974.1661934573.git.aburgess@redhat.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-09-27 07:04:38 +10:00
..
aarch64-core.xml
aarch64-fpu.xml
arm-core.xml
arm-m-profile-mve.xml target/arm: Advertise MVE to gdb when present 2021-11-02 14:14:55 -04:00
arm-m-profile.xml target/arm: Use correct GDB XML for M-profile cores 2020-05-14 15:03:08 +01:00
arm-neon.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp3.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp-sysregs.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
arm-vfp.xml target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
avr-cpu.xml target/avr: CPU class: Add GDB support 2020-07-10 17:58:32 +02:00
cf-core.xml
cf-fp.xml
i386-32bit.xml
i386-64bit.xml
loongarch-base64.xml target/loongarch: update loongarch-base64.xml 2022-08-05 10:02:40 -07:00
loongarch-fpu.xml target/loongarch: Update loongarch-fpu.xml 2022-08-05 10:02:40 -07:00
m68k-core.xml target/m68k: fix gdb for m68xxx 2020-05-06 09:29:26 +01:00
m68k-fp.xml
power64-core.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
riscv-32bit-cpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-32bit-fpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-32bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
riscv-64bit-cpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-64bit-fpu.xml target/riscv: remove fixed numbering from GDB xml feature files 2022-09-27 07:04:38 +10:00
riscv-64bit-virtual.xml target/riscv: Expose "priv" register for GDB for reads 2019-10-28 07:47:29 -07:00
rx-core.xml target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml
s390-virt.xml
s390-vx.xml
s390x-core64.xml