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https://github.com/xemu-project/xemu.git
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999b53ec87
Use libvixl to implement disassembly output in debug logs for A64, for use with both AArch64 hosts and targets. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> [PMM: * added support for target disassembly * switched to custom QEMUDisassembler so the output format matches what QEMU expects * make sure we correctly fall back to "just print hex" if we didn't build the AArch64 disassembler because of lack of a C++ compiler * rename from 'aarch64' to 'arm-a64' because this is a disassembler for the A64 instruction set * merge aarch64.c and aarch64-cxx.cc into one C++ file * simplify the aarch64.c<->aarch64-cxx.cc interface] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
529 lines
14 KiB
C
529 lines
14 KiB
C
/* General "disassemble this chunk" code. Used for debugging. */
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#include "config.h"
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#include "disas/bfd.h"
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#include "elf.h"
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#include <errno.h>
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#include "cpu.h"
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#include "disas/disas.h"
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typedef struct CPUDebug {
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struct disassemble_info info;
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CPUArchState *env;
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} CPUDebug;
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/* Filled in by elfload.c. Simplistic, but will do for now. */
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struct syminfo *syminfos = NULL;
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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Transfer them to myaddr. */
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int
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buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info)
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{
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if (memaddr < info->buffer_vma
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|| memaddr + length > info->buffer_vma + info->buffer_length)
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/* Out of bounds. Use EIO because GDB uses it. */
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return EIO;
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memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
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return 0;
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}
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/* Get LENGTH bytes from info's buffer, at target address memaddr.
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Transfer them to myaddr. */
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static int
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target_read_memory (bfd_vma memaddr,
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bfd_byte *myaddr,
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int length,
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struct disassemble_info *info)
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{
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CPUDebug *s = container_of(info, CPUDebug, info);
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cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
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return 0;
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}
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/* Print an error message. We can assume that this is in response to
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an error return from buffer_read_memory. */
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void
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perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
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{
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if (status != EIO)
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/* Can't happen. */
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(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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else
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/* Actually, address between memaddr and memaddr + len was
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out of bounds. */
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(*info->fprintf_func) (info->stream,
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"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
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}
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/* This could be in a separate file, to save minuscule amounts of space
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in statically linked executables. */
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/* Just print the address is hex. This is included for completeness even
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though both GDB and objdump provide their own (to print symbolic
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addresses). */
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void
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generic_print_address (bfd_vma addr, struct disassemble_info *info)
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{
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(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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}
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/* Print address in hex, truncated to the width of a target virtual address. */
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static void
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generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
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{
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uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
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generic_print_address(addr & mask, info);
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}
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/* Print address in hex, truncated to the width of a host virtual address. */
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static void
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generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
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{
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uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
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generic_print_address(addr & mask, info);
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}
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/* Just return the given address. */
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int
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generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
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{
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return 1;
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}
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bfd_vma bfd_getl64 (const bfd_byte *addr)
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{
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unsigned long long v;
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v = (unsigned long long) addr[0];
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v |= (unsigned long long) addr[1] << 8;
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v |= (unsigned long long) addr[2] << 16;
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v |= (unsigned long long) addr[3] << 24;
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v |= (unsigned long long) addr[4] << 32;
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v |= (unsigned long long) addr[5] << 40;
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v |= (unsigned long long) addr[6] << 48;
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v |= (unsigned long long) addr[7] << 56;
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return (bfd_vma) v;
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}
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bfd_vma bfd_getl32 (const bfd_byte *addr)
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{
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unsigned long v;
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v = (unsigned long) addr[0];
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v |= (unsigned long) addr[1] << 8;
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v |= (unsigned long) addr[2] << 16;
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v |= (unsigned long) addr[3] << 24;
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return (bfd_vma) v;
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}
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bfd_vma bfd_getb32 (const bfd_byte *addr)
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{
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unsigned long v;
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v = (unsigned long) addr[0] << 24;
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v |= (unsigned long) addr[1] << 16;
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v |= (unsigned long) addr[2] << 8;
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v |= (unsigned long) addr[3];
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return (bfd_vma) v;
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}
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bfd_vma bfd_getl16 (const bfd_byte *addr)
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{
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unsigned long v;
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v = (unsigned long) addr[0];
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v |= (unsigned long) addr[1] << 8;
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return (bfd_vma) v;
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}
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bfd_vma bfd_getb16 (const bfd_byte *addr)
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{
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unsigned long v;
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v = (unsigned long) addr[0] << 24;
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v |= (unsigned long) addr[1] << 16;
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return (bfd_vma) v;
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}
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#ifdef TARGET_ARM
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static int
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print_insn_thumb1(bfd_vma pc, disassemble_info *info)
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{
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return print_insn_arm(pc | 1, info);
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}
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#endif
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static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
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const char *prefix)
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{
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int i, n = info->buffer_length;
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uint8_t *buf = g_malloc(n);
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info->read_memory_func(pc, buf, n, info);
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for (i = 0; i < n; ++i) {
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if (i % 32 == 0) {
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info->fprintf_func(info->stream, "\n%s: ", prefix);
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}
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info->fprintf_func(info->stream, "%02x", buf[i]);
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}
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g_free(buf);
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return n;
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}
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static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
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{
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return print_insn_objdump(pc, info, "OBJD-H");
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}
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static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
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{
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return print_insn_objdump(pc, info, "OBJD-T");
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}
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/* Disassemble this for me please... (debugging). 'flags' has the following
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values:
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i386 - 1 means 16 bit code, 2 means 64 bit code
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arm - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
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ppc - nonzero means little endian
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other targets - unused
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*/
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void target_disas(FILE *out, CPUArchState *env, target_ulong code,
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target_ulong size, int flags)
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{
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target_ulong pc;
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int count;
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CPUDebug s;
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int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
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INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
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s.env = env;
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s.info.read_memory_func = target_read_memory;
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s.info.buffer_vma = code;
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s.info.buffer_length = size;
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s.info.print_address_func = generic_print_target_address;
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#ifdef TARGET_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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#else
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s.info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(TARGET_I386)
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if (flags == 2) {
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s.info.mach = bfd_mach_x86_64;
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} else if (flags == 1) {
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s.info.mach = bfd_mach_i386_i8086;
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} else {
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s.info.mach = bfd_mach_i386_i386;
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}
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print_insn = print_insn_i386;
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#elif defined(TARGET_ARM)
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if (flags & 4) {
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/* We might not be compiled with the A64 disassembler
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* because it needs a C++ compiler; in that case we will
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* fall through to the default print_insn_od case.
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*/
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#if defined(CONFIG_ARM_A64_DIS)
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print_insn = print_insn_arm_a64;
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#endif
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} else if (flags & 1) {
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print_insn = print_insn_thumb1;
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} else {
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print_insn = print_insn_arm;
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}
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if (flags & 2) {
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#ifdef TARGET_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_LITTLE;
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#else
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s.info.endian = BFD_ENDIAN_BIG;
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#endif
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}
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#elif defined(TARGET_SPARC)
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print_insn = print_insn_sparc;
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#ifdef TARGET_SPARC64
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s.info.mach = bfd_mach_sparc_v9b;
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#endif
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#elif defined(TARGET_PPC)
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if (flags >> 16) {
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s.info.endian = BFD_ENDIAN_LITTLE;
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}
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if (flags & 0xFFFF) {
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/* If we have a precise definitions of the instructions set, use it */
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s.info.mach = flags & 0xFFFF;
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} else {
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#ifdef TARGET_PPC64
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s.info.mach = bfd_mach_ppc64;
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#else
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s.info.mach = bfd_mach_ppc;
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#endif
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}
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s.info.disassembler_options = (char *)"any";
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print_insn = print_insn_ppc;
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#elif defined(TARGET_M68K)
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print_insn = print_insn_m68k;
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#elif defined(TARGET_MIPS)
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#ifdef TARGET_WORDS_BIGENDIAN
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print_insn = print_insn_big_mips;
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#else
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print_insn = print_insn_little_mips;
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#endif
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#elif defined(TARGET_SH4)
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s.info.mach = bfd_mach_sh4;
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print_insn = print_insn_sh;
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#elif defined(TARGET_ALPHA)
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s.info.mach = bfd_mach_alpha_ev6;
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print_insn = print_insn_alpha;
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#elif defined(TARGET_CRIS)
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if (flags != 32) {
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s.info.mach = bfd_mach_cris_v0_v10;
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print_insn = print_insn_crisv10;
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} else {
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s.info.mach = bfd_mach_cris_v32;
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print_insn = print_insn_crisv32;
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}
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#elif defined(TARGET_S390X)
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s.info.mach = bfd_mach_s390_64;
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print_insn = print_insn_s390;
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#elif defined(TARGET_MICROBLAZE)
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s.info.mach = bfd_arch_microblaze;
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print_insn = print_insn_microblaze;
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#elif defined(TARGET_MOXIE)
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s.info.mach = bfd_arch_moxie;
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print_insn = print_insn_moxie;
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#elif defined(TARGET_LM32)
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s.info.mach = bfd_mach_lm32;
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print_insn = print_insn_lm32;
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#endif
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if (print_insn == NULL) {
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print_insn = print_insn_od_target;
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}
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for (pc = code; size > 0; pc += count, size -= count) {
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fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
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count = print_insn(pc, &s.info);
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#if 0
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{
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int i;
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uint8_t b;
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fprintf(out, " {");
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for(i = 0; i < count; i++) {
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target_read_memory(pc + i, &b, 1, &s.info);
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fprintf(out, " %02x", b);
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}
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fprintf(out, " }");
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}
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#endif
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fprintf(out, "\n");
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if (count < 0)
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break;
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if (size < count) {
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fprintf(out,
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"Disassembler disagrees with translator over instruction "
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"decoding\n"
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"Please report this to qemu-devel@nongnu.org\n");
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break;
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}
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}
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}
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/* Disassemble this for me please... (debugging). */
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void disas(FILE *out, void *code, unsigned long size)
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{
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uintptr_t pc;
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int count;
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CPUDebug s;
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int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
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INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
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s.info.print_address_func = generic_print_host_address;
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s.info.buffer = code;
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s.info.buffer_vma = (uintptr_t)code;
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s.info.buffer_length = size;
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#ifdef HOST_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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#else
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s.info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(CONFIG_TCG_INTERPRETER)
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print_insn = print_insn_tci;
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#elif defined(__i386__)
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s.info.mach = bfd_mach_i386_i386;
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print_insn = print_insn_i386;
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#elif defined(__x86_64__)
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s.info.mach = bfd_mach_x86_64;
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print_insn = print_insn_i386;
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#elif defined(_ARCH_PPC)
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s.info.disassembler_options = (char *)"any";
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print_insn = print_insn_ppc;
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#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
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print_insn = print_insn_arm_a64;
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#elif defined(__alpha__)
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print_insn = print_insn_alpha;
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#elif defined(__sparc__)
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print_insn = print_insn_sparc;
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s.info.mach = bfd_mach_sparc_v9b;
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#elif defined(__arm__)
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print_insn = print_insn_arm;
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#elif defined(__MIPSEB__)
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print_insn = print_insn_big_mips;
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#elif defined(__MIPSEL__)
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print_insn = print_insn_little_mips;
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#elif defined(__m68k__)
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print_insn = print_insn_m68k;
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#elif defined(__s390__)
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print_insn = print_insn_s390;
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#elif defined(__hppa__)
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print_insn = print_insn_hppa;
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#elif defined(__ia64__)
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print_insn = print_insn_ia64;
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#endif
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if (print_insn == NULL) {
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print_insn = print_insn_od_host;
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}
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for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
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fprintf(out, "0x%08" PRIxPTR ": ", pc);
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count = print_insn(pc, &s.info);
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fprintf(out, "\n");
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if (count < 0)
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break;
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}
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}
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/* Look up symbol for debugging purpose. Returns "" if unknown. */
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const char *lookup_symbol(target_ulong orig_addr)
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{
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const char *symbol = "";
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struct syminfo *s;
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for (s = syminfos; s; s = s->next) {
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symbol = s->lookup_symbol(s, orig_addr);
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if (symbol[0] != '\0') {
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break;
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}
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}
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return symbol;
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}
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#if !defined(CONFIG_USER_ONLY)
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#include "monitor/monitor.h"
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static int monitor_disas_is_physical;
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static int
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monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
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struct disassemble_info *info)
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{
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CPUDebug *s = container_of(info, CPUDebug, info);
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if (monitor_disas_is_physical) {
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cpu_physical_memory_read(memaddr, myaddr, length);
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} else {
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cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
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}
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return 0;
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}
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static int GCC_FMT_ATTR(2, 3)
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monitor_fprintf(FILE *stream, const char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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monitor_vprintf((Monitor *)stream, fmt, ap);
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va_end(ap);
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return 0;
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}
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void monitor_disas(Monitor *mon, CPUArchState *env,
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target_ulong pc, int nb_insn, int is_physical, int flags)
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{
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int count, i;
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CPUDebug s;
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int (*print_insn)(bfd_vma pc, disassemble_info *info);
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INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
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s.env = env;
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monitor_disas_is_physical = is_physical;
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s.info.read_memory_func = monitor_read_memory;
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s.info.print_address_func = generic_print_target_address;
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s.info.buffer_vma = pc;
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#ifdef TARGET_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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#else
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s.info.endian = BFD_ENDIAN_LITTLE;
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#endif
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#if defined(TARGET_I386)
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if (flags == 2) {
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s.info.mach = bfd_mach_x86_64;
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} else if (flags == 1) {
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s.info.mach = bfd_mach_i386_i8086;
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} else {
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s.info.mach = bfd_mach_i386_i386;
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}
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print_insn = print_insn_i386;
|
|
#elif defined(TARGET_ARM)
|
|
print_insn = print_insn_arm;
|
|
#elif defined(TARGET_ALPHA)
|
|
print_insn = print_insn_alpha;
|
|
#elif defined(TARGET_SPARC)
|
|
print_insn = print_insn_sparc;
|
|
#ifdef TARGET_SPARC64
|
|
s.info.mach = bfd_mach_sparc_v9b;
|
|
#endif
|
|
#elif defined(TARGET_PPC)
|
|
#ifdef TARGET_PPC64
|
|
s.info.mach = bfd_mach_ppc64;
|
|
#else
|
|
s.info.mach = bfd_mach_ppc;
|
|
#endif
|
|
print_insn = print_insn_ppc;
|
|
#elif defined(TARGET_M68K)
|
|
print_insn = print_insn_m68k;
|
|
#elif defined(TARGET_MIPS)
|
|
#ifdef TARGET_WORDS_BIGENDIAN
|
|
print_insn = print_insn_big_mips;
|
|
#else
|
|
print_insn = print_insn_little_mips;
|
|
#endif
|
|
#elif defined(TARGET_SH4)
|
|
s.info.mach = bfd_mach_sh4;
|
|
print_insn = print_insn_sh;
|
|
#elif defined(TARGET_S390X)
|
|
s.info.mach = bfd_mach_s390_64;
|
|
print_insn = print_insn_s390;
|
|
#elif defined(TARGET_MOXIE)
|
|
s.info.mach = bfd_arch_moxie;
|
|
print_insn = print_insn_moxie;
|
|
#elif defined(TARGET_LM32)
|
|
s.info.mach = bfd_mach_lm32;
|
|
print_insn = print_insn_lm32;
|
|
#else
|
|
monitor_printf(mon, "0x" TARGET_FMT_lx
|
|
": Asm output not supported on this arch\n", pc);
|
|
return;
|
|
#endif
|
|
|
|
for(i = 0; i < nb_insn; i++) {
|
|
monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
|
|
count = print_insn(pc, &s.info);
|
|
monitor_printf(mon, "\n");
|
|
if (count < 0)
|
|
break;
|
|
pc += count;
|
|
}
|
|
}
|
|
#endif
|