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fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/*
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* QEMU SuperH CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_SUPERH_CPU_QOM_H
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#define QEMU_SUPERH_CPU_QOM_H
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#include "qom/cpu.h"
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#define TYPE_SUPERH_CPU "superh-cpu"
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#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
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#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
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#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
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#define SUPERH_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
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#define SUPERH_CPU(obj) \
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OBJECT_CHECK(SuperHCPU, (obj), TYPE_SUPERH_CPU)
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#define SUPERH_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SuperHCPUClass, (obj), TYPE_SUPERH_CPU)
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/**
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* SuperHCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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* @name: The name.
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* @pvr: Processor Version Register
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* @prr: Processor Revision Register
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* @cvr: Cache Version Register
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*
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* A SuperH CPU model.
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*/
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typedef struct SuperHCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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const char *name;
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uint32_t pvr;
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uint32_t prr;
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uint32_t cvr;
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} SuperHCPUClass;
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typedef struct SuperHCPU SuperHCPU;
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#endif
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