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e516572fde
Lay the groundwork for subsequent ich9 support. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/*
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* QEMU GMCH/ICH9 LPC PM Emulation
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*
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* Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#ifndef HW_ACPI_ICH9_H
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#define HW_ACPI_ICH9_H
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#include "acpi.h"
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typedef struct ICH9LPCPMRegs {
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/*
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* In ich9 spec says that pm1_cnt register is 32bit width and
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* that the upper 16bits are reserved and unused.
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* PM1a_CNT_BLK = 2 in FADT so it is defined as uint16_t.
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*/
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ACPIREGS acpi_regs;
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uint32_t smi_en;
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uint32_t smi_sts;
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qemu_irq irq; /* SCI */
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uint32_t pm_io_base;
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Notifier powerdown_notifier;
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} ICH9LPCPMRegs;
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void ich9_pm_init(ICH9LPCPMRegs *pm,
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qemu_irq sci_irq, qemu_irq cmos_s3_resume);
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
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extern const VMStateDescription vmstate_ich9_pm;
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#endif /* HW_ACPI_ICH9_H */
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