Alistair Francis ff832b77aa target/riscv: Don't set PMP feature in the cpu init ... The PMP is enabled by default via the "pmp" property so there is no need for us to set it in the init function. As all CPUs have PMP support just remove the set_feature() call in the CPU init functions. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>		2020-06-03 09:11:51 -07:00
..
insn_trans	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
cpu_bits.h	target/riscv: Add the MSTATUS_MPV_ISSET helper macro	2020-02-27 13:46:33 -08:00
cpu_helper.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
cpu_user.h
cpu-param.h
cpu.c	target/riscv: Don't set PMP feature in the cpu init	2020-06-03 09:11:51 -07:00
cpu.h	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
csr.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
fpu_helper.c
gdbstub.c	gdbstub: extend GByteArray to read register helpers	2020-03-17 17:38:38 +00:00
helper.h
insn16-32.decode
insn16-64.decode
insn16.decode
insn32-64.decode
insn32.decode	target/riscv: Remove the hret instruction	2020-02-27 13:45:45 -08:00
instmap.h	target/riscv: progressively load the instruction during decode	2020-02-25 20:20:23 +00:00
Makefile.objs
monitor.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
op_helper.c	target/riscv: Drop support for ISA spec version 1.09.1	2020-06-03 09:11:51 -07:00
pmp.c	target/riscv: PMP violation due to wrong size parameter	2019-10-28 08:46:33 -07:00
pmp.h
trace-events
translate.c	target/riscv: Add the MSTATUS_MPV_ISSET helper macro	2020-02-27 13:46:33 -08:00