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armv5 optimizations
patch by Siarhei Siamashka siarhei.siamashka at gmail com Originally committed as revision 6228 to svn://svn.ffmpeg.org/ffmpeg/trunk
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@ -27,6 +27,11 @@
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#include "bitstream.h"
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#include "dsputil.h"
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/* Assume that all Intel XScale processors support armv5 edsp instructions */
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#if defined(ARCH_ARMV4L) && defined (HAVE_IWMMXT)
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#define ARCH_ARM5E
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#endif
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/*
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* TODO:
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* - in low precision mode, use more 16 bit multiplies in synth filter
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@ -791,6 +796,17 @@ static inline int round_sample(int *sum)
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/* signed 16x16 -> 32 multiply */
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# define MULS(ra, rb) \
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({ int __rt; asm ("mullhw %0, %1, %2" : "=r" (__rt) : "r" (ra), "r" (rb)); __rt; })
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# elif defined(ARCH_ARM5E)
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/* signed 16x16 -> 32 multiply add accumulate */
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# define MACS(rt, ra, rb) \
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asm ("smlabb %0, %2, %3, %0" : "=r" (rt) : "0" (rt), "r" (ra), "r" (rb));
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/* signed 16x16 -> 32 multiply */
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# define MULS(ra, rb) \
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({ int __rt; asm ("smulbb %0, %1, %2" : "=r" (__rt) : "r" (ra), "r" (rb)); __rt; })
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# else
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/* signed 16x16 -> 32 multiply add accumulate */
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# define MACS(rt, ra, rb) rt += (ra) * (rb)
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