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https://github.com/xenia-project/FFmpeg.git
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vp9: add 10/12bpp sse2 SIMD version for idct_idct_16x16.
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cb054d061a
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1338fb79d4
@ -135,6 +135,7 @@ decl_itxfm_func(idct, iadst, 4, BPC, sse2);
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decl_itxfm_func(iadst, idct, 4, BPC, sse2);
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decl_itxfm_func(iadst, iadst, 4, BPC, sse2);
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decl_itxfm_funcs(8, BPC, sse2);
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decl_itxfm_func(idct, idct, 16, BPC, sse2);
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#endif /* HAVE_YASM */
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av_cold void INIT_FUNC(VP9DSPContext *dsp, int bitexact)
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@ -206,6 +207,7 @@ av_cold void INIT_FUNC(VP9DSPContext *dsp, int bitexact)
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init_itx_funcs(TX_4X4, 4, 12, sse2);
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#endif
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init_itx_funcs(TX_8X8, 8, BPC, sse2);
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init_itx_func(TX_16X16, DCT_DCT, idct, idct, 16, BPC, sse2);
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}
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if (EXTERNAL_SSSE3(cpu_flags)) {
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@ -32,6 +32,7 @@ cextern pw_4095
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cextern pw_m1
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cextern pd_1
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cextern pd_16
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cextern pd_32
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cextern pd_8192
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pd_8: times 4 dd 8
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@ -530,19 +531,19 @@ IADST4_12BPP_FN iadst, IADST4, idct, IDCT4
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IADST4_12BPP_FN iadst, IADST4, iadst, IADST4
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; the following line has not been executed at the end of this macro:
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; UNSCRATCH 6, 8, rsp+17*mmsize
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%macro IDCT8_1D 1 ; src
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mova m0, [%1+ 0*mmsize]
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mova m2, [%1+ 4*mmsize]
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mova m4, [%1+ 8*mmsize]
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mova m6, [%1+12*mmsize]
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; UNSCRATCH 6, 8, rsp+%3*mmsize
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%macro IDCT8_1D 1-3 2 * mmsize, 17 ; src, src_stride, stack_offset
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mova m0, [%1+0*%2]
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mova m2, [%1+2*%2]
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mova m4, [%1+4*%2]
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mova m6, [%1+6*%2]
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IDCT4_12BPP_1D 0, 2, 4, 6, 1, 3 ; m0/2/4/6 have t0/1/2/3
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SCRATCH 4, 8, rsp+17*mmsize
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SCRATCH 6, 9, rsp+18*mmsize
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mova m1, [%1+ 2*mmsize]
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mova m3, [%1+ 6*mmsize]
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mova m5, [%1+10*mmsize]
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mova m7, [%1+14*mmsize]
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SCRATCH 4, 8, rsp+(%3+0)*mmsize
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SCRATCH 6, 9, rsp+(%3+1)*mmsize
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mova m1, [%1+1*%2]
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mova m3, [%1+3*%2]
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mova m5, [%1+5*%2]
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mova m7, [%1+7*%2]
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SUMSUB_MUL 1, 7, 4, 6, 16069, 3196 ; m1=t7a, m7=t4a
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SUMSUB_MUL 5, 3, 4, 6, 9102, 13623 ; m5=t6a, m3=t5a
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SUMSUB_BA d, 3, 7, 4 ; m3=t4, m7=t5a
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@ -550,9 +551,9 @@ IADST4_12BPP_FN iadst, IADST4, iadst, IADST4
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SUMSUB_MUL 1, 7, 4, 6, 11585, 11585 ; m1=t6, m7=t5
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SUMSUB_BA d, 5, 0, 4 ; m5=out0, m0=out7
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SUMSUB_BA d, 1, 2, 4 ; m1=out1, m2=out6
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UNSCRATCH 4, 8, rsp+17*mmsize
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UNSCRATCH 6, 9, rsp+18*mmsize
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SCRATCH 2, 8, rsp+17*mmsize
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UNSCRATCH 4, 8, rsp+(%3+0)*mmsize
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UNSCRATCH 6, 9, rsp+(%3+1)*mmsize
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SCRATCH 2, 8, rsp+(%3+0)*mmsize
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SUMSUB_BA d, 7, 4, 2 ; m7=out2, m4=out5
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SUMSUB_BA d, 3, 6, 2 ; m3=out3, m6=out4
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SWAP 0, 5, 4, 6, 2, 7
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@ -772,7 +773,7 @@ cglobal vp9_idct_idct_8x8_add_12, 4, 6 + ARCH_X86_64, 10, \
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; the following line has not been executed at the end of this macro:
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; UNSCRATCH 6, 8, rsp+17*mmsize
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%macro IADST8_1D 1
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%macro IADST8_1D 1 ; src
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mova m0, [%1+ 0*mmsize]
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mova m3, [%1+ 6*mmsize]
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mova m4, [%1+ 8*mmsize]
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@ -904,3 +905,207 @@ INIT_XMM sse2
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IADST8_FN idct, IDCT8, iadst, IADST8
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IADST8_FN iadst, IADST8, idct, IDCT8
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IADST8_FN iadst, IADST8, iadst, IADST8
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%macro IDCT16_1D 1 ; src
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IDCT8_1D %1, 8 * mmsize, 67 ; m0-3=t0-3a, m4-5/m8|r67/m7=t4-7
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; SCRATCH 6, 8, rsp+67*mmsize ; t6
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SCRATCH 0, 15, rsp+74*mmsize ; t0a
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SCRATCH 1, 14, rsp+73*mmsize ; t1a
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SCRATCH 2, 13, rsp+72*mmsize ; t2a
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SCRATCH 3, 12, rsp+71*mmsize ; t3a
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SCRATCH 4, 11, rsp+70*mmsize ; t4
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mova [rsp+65*mmsize], m5 ; t5
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mova [rsp+66*mmsize], m7 ; t7
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mova m0, [%1+ 1*4*mmsize] ; in1
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mova m3, [%1+ 7*4*mmsize] ; in7
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mova m4, [%1+ 9*4*mmsize] ; in9
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mova m7, [%1+15*4*mmsize] ; in15
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SUMSUB_MUL 0, 7, 1, 2, 16305, 1606 ; m0=t15a, m7=t8a
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SUMSUB_MUL 4, 3, 1, 2, 10394, 12665 ; m4=t14a, m3=t9a
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SUMSUB_BA d, 3, 7, 1 ; m3=t8, m7=t9
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SUMSUB_BA d, 4, 0, 1 ; m4=t15,m0=t14
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SUMSUB_MUL 0, 7, 1, 2, 15137, 6270 ; m0=t14a, m7=t9a
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mova m1, [%1+ 3*4*mmsize] ; in3
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mova m2, [%1+ 5*4*mmsize] ; in5
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mova m5, [%1+11*4*mmsize] ; in11
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mova m6, [%1+13*4*mmsize] ; in13
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SCRATCH 0, 9, rsp+68*mmsize
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SCRATCH 7, 10, rsp+69*mmsize
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SUMSUB_MUL 2, 5, 0, 7, 14449, 7723 ; m2=t13a, m5=t10a
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SUMSUB_MUL 6, 1, 0, 7, 4756, 15679 ; m6=t12a, m1=t11a
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SUMSUB_BA d, 5, 1, 0 ; m5=t11,m1=t10
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SUMSUB_BA d, 2, 6, 0 ; m2=t12,m6=t13
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NEGD m1 ; m1=-t10
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SUMSUB_MUL 1, 6, 0, 7, 15137, 6270 ; m1=t13a, m6=t10a
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UNSCRATCH 7, 10, rsp+69*mmsize
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SUMSUB_BA d, 5, 3, 0 ; m5=t8a, m3=t11a
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SUMSUB_BA d, 6, 7, 0 ; m6=t9, m7=t10
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SUMSUB_BA d, 2, 4, 0 ; m2=t15a,m4=t12a
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SCRATCH 5, 10, rsp+69*mmsize
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SUMSUB_MUL 4, 3, 0, 5, 11585, 11585 ; m4=t12, m3=t11
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UNSCRATCH 0, 9, rsp+68*mmsize
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SUMSUB_BA d, 1, 0, 5 ; m1=t14, m0=t13
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SCRATCH 6, 9, rsp+68*mmsize
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SUMSUB_MUL 0, 7, 6, 5, 11585, 11585 ; m0=t13a,m7=t10a
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; order: 15|r74,14|r73,13|r72,12|r71,11|r70,r65,8|r67,r66,10|r69,9|r68,7,3,4,0,1,2
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; free: 6,5
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UNSCRATCH 5, 15, rsp+74*mmsize
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SUMSUB_BA d, 2, 5, 6 ; m2=out0, m5=out15
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SCRATCH 5, 15, rsp+74*mmsize
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UNSCRATCH 5, 14, rsp+73*mmsize
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SUMSUB_BA d, 1, 5, 6 ; m1=out1, m5=out14
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SCRATCH 5, 14, rsp+73*mmsize
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UNSCRATCH 5, 13, rsp+72*mmsize
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SUMSUB_BA d, 0, 5, 6 ; m0=out2, m5=out13
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SCRATCH 5, 13, rsp+72*mmsize
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UNSCRATCH 5, 12, rsp+71*mmsize
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SUMSUB_BA d, 4, 5, 6 ; m4=out3, m5=out12
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SCRATCH 5, 12, rsp+71*mmsize
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UNSCRATCH 5, 11, rsp+70*mmsize
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SUMSUB_BA d, 3, 5, 6 ; m3=out4, m5=out11
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SCRATCH 4, 11, rsp+70*mmsize
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mova m4, [rsp+65*mmsize]
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SUMSUB_BA d, 7, 4, 6 ; m7=out5, m4=out10
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mova [rsp+65*mmsize], m5
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UNSCRATCH 5, 8, rsp+67*mmsize
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UNSCRATCH 6, 9, rsp+68*mmsize
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SCRATCH 2, 8, rsp+67*mmsize
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SCRATCH 1, 9, rsp+68*mmsize
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UNSCRATCH 1, 10, rsp+69*mmsize
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SCRATCH 0, 10, rsp+69*mmsize
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mova m0, [rsp+66*mmsize]
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SUMSUB_BA d, 6, 5, 2 ; m6=out6, m5=out9
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SUMSUB_BA d, 1, 0, 2 ; m1=out7, m0=out8
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SWAP 0, 3, 1, 7, 2, 6, 4
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; output order: 8-11|r67-70=out0-3
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; 0-6,r65=out4-11
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; 12-15|r71-74=out12-15
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%endmacro
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INIT_XMM sse2
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cglobal vp9_idct_idct_16x16_add_10, 4, 6 + ARCH_X86_64, 16, \
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67 * mmsize + ARCH_X86_32 * 8 * mmsize, \
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dst, stride, block, eob
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mova m0, [pw_1023]
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cmp eobd, 1
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jg .idctfull
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; dc-only
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.idctfull:
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mova [rsp+64*mmsize], m0
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DEFINE_ARGS dst, stride, block, cnt, ptr, stride3, dstbak
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%if ARCH_X86_64
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mov dstbakq, dstq
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%endif
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lea stride3q, [strideq*3]
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mov cntd, 4
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mov ptrq, rsp
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.loop_1:
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IDCT16_1D blockq
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; order: 2,1,0,11,3,7,9,10,6,8,4,5,12,13,r65,15
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TRANSPOSE4x4D 0, 1, 2, 3, 7
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mova [ptrq+ 1*mmsize], m0
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mova [ptrq+ 5*mmsize], m1
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mova [ptrq+ 9*mmsize], m2
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mova [ptrq+13*mmsize], m3
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mova m7, [rsp+65*mmsize]
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TRANSPOSE4x4D 4, 5, 6, 7, 0
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mova [ptrq+ 2*mmsize], m4
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mova [ptrq+ 6*mmsize], m5
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mova [ptrq+10*mmsize], m6
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mova [ptrq+14*mmsize], m7
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UNSCRATCH 0, 8, rsp+67*mmsize
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UNSCRATCH 1, 9, rsp+68*mmsize
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UNSCRATCH 2, 10, rsp+69*mmsize
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UNSCRATCH 3, 11, rsp+70*mmsize
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TRANSPOSE4x4D 0, 1, 2, 3, 7
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mova [ptrq+ 0*mmsize], m0
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mova [ptrq+ 4*mmsize], m1
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mova [ptrq+ 8*mmsize], m2
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mova [ptrq+12*mmsize], m3
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UNSCRATCH 4, 12, rsp+71*mmsize
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UNSCRATCH 5, 13, rsp+72*mmsize
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UNSCRATCH 6, 14, rsp+73*mmsize
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UNSCRATCH 7, 15, rsp+74*mmsize
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TRANSPOSE4x4D 4, 5, 6, 7, 0
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mova [ptrq+ 3*mmsize], m4
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mova [ptrq+ 7*mmsize], m5
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mova [ptrq+11*mmsize], m6
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mova [ptrq+15*mmsize], m7
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add ptrq, 16 * mmsize
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add blockq, mmsize
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dec cntd
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jg .loop_1
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mov cntd, 4
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mov ptrq, rsp
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.loop_2:
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IDCT16_1D ptrq
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pxor m7, m7
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lea dstq, [dstq+strideq*4]
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ROUND_AND_STORE_4x4 0, 1, 2, 3, m7, [rsp+64*mmsize], [pd_32], 6
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lea dstq, [dstq+strideq*4]
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mova m0, [rsp+65*mmsize]
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ROUND_AND_STORE_4x4 4, 5, 6, 0, m7, [rsp+64*mmsize], [pd_32], 6
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%if ARCH_X86_64
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DEFINE_ARGS dstbak, stride, block, cnt, ptr, stride3, dst
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%else
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mov dstq, dstm
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%endif
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UNSCRATCH 0, 8, rsp+67*mmsize
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UNSCRATCH 1, 9, rsp+68*mmsize
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UNSCRATCH 2, 10, rsp+69*mmsize
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UNSCRATCH 3, 11, rsp+70*mmsize
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ROUND_AND_STORE_4x4 0, 1, 2, 3, m7, [rsp+64*mmsize], [pd_32], 6
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%if ARCH_X86_64
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DEFINE_ARGS dst, stride, block, cnt, ptr, stride3, dstbak
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lea dstq, [dstbakq+stride3q*4]
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%else
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lea dstq, [dstq+stride3q*4]
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%endif
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UNSCRATCH 4, 12, rsp+71*mmsize
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UNSCRATCH 5, 13, rsp+72*mmsize
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UNSCRATCH 6, 14, rsp+73*mmsize
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UNSCRATCH 0, 15, rsp+74*mmsize
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ROUND_AND_STORE_4x4 4, 5, 6, 0, m7, [rsp+64*mmsize], [pd_32], 6
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add ptrq, mmsize
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%if ARCH_X86_64
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add dstbakq, 8
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mov dstq, dstbakq
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%else
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add dword dstm, 8
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mov dstq, dstm
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%endif
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dec cntd
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jg .loop_2
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; m7 is still zero
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ZERO_BLOCK blockq-4*mmsize, 64, 16, m7
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RET
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INIT_XMM sse2
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cglobal vp9_idct_idct_16x16_add_12, 4, 6 + ARCH_X86_64, 16, \
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67 * mmsize + ARCH_X86_32 * 8 * mmsize, \
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dst, stride, block, eob
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mova m0, [pw_4095]
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cmp eobd, 1
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jg mangle(private_prefix %+ _ %+ vp9_idct_idct_16x16_add_10 %+ SUFFIX).idctfull
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; dc-only
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jmp mangle(private_prefix %+ _ %+ vp9_idct_idct_16x16_add_10 %+ SUFFIX).idctfull
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RET
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