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https://github.com/xenia-project/FFmpeg.git
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armv6: Accelerate vector_fmul_window
I benchmarked the result by measuring the number of gperftools samples that
hit anywhere in the AAC decoder (starting from aac_decode_frame()) or
specifically in vector_fmul_window_c() / ff_vector_fmul_window_vfp() for the
same sample AAC stream:
Before After
Mean StdDev Mean StdDev Confidence Change
Audio decode 1598.2 47.4 1529.2 25.4 100.0% +4.5%
vector_fmul_window 244.0 22.1 188.9 22.3 100.0% +29.2%
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Ben Avison
Martin Storsjö
parent
87552d54d3
commit
5edad2c4a1
@ -26,12 +26,17 @@
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void ff_vector_fmul_vfp(float *dst, const float *src0, const float *src1,
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void ff_vector_fmul_vfp(float *dst, const float *src0, const float *src1,
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int len);
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int len);
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void ff_vector_fmul_window_vfp(float *dst, const float *src0,
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const float *src1, const float *win, int len);
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void ff_vector_fmul_reverse_vfp(float *dst, const float *src0,
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void ff_vector_fmul_reverse_vfp(float *dst, const float *src0,
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const float *src1, int len);
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const float *src1, int len);
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av_cold void ff_float_dsp_init_vfp(AVFloatDSPContext *fdsp, int cpu_flags)
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av_cold void ff_float_dsp_init_vfp(AVFloatDSPContext *fdsp, int cpu_flags)
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{
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{
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if (!have_vfpv3(cpu_flags))
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if (!have_vfpv3(cpu_flags)) {
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fdsp->vector_fmul = ff_vector_fmul_vfp;
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fdsp->vector_fmul = ff_vector_fmul_vfp;
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fdsp->vector_fmul_window = ff_vector_fmul_window_vfp;
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}
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fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_vfp;
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fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_vfp;
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}
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}
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@ -67,6 +67,210 @@ function ff_vector_fmul_vfp, export=1
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bx lr
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bx lr
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endfunc
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endfunc
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/**
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* ARM VFP implementation of 'vector_fmul_window_c' function
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* Assume that len is a positive non-zero number
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*/
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@ void ff_vector_fmul_window_vfp(float *dst, const float *src0,
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@ const float *src1, const float *win, int len)
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function ff_vector_fmul_window_vfp, export=1
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DST0 .req a1
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SRC0 .req a2
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SRC1 .req a3
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WIN0 .req a4
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LEN .req v1
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DST1 .req v2
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WIN1 .req v3
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OLDFPSCR .req ip
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push {v1-v3,lr}
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ldr LEN, [sp, #4*4+0]
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vpush {s16-s31}
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fmrx OLDFPSCR, FPSCR
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add DST1, DST0, LEN, lsl #3
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add SRC1, SRC1, LEN, lsl #2
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add WIN1, WIN0, LEN, lsl #3
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tst LEN, #7
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beq 4f @ common case: len is a multiple of 8
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ldr lr, =0x03000000 @ RunFast mode, scalar mode
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fmxr FPSCR, lr
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tst LEN, #1
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beq 1f
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vldmdb WIN1!, {s0}
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vldmia SRC0!, {s8}
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vldmia WIN0!, {s16}
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vmul.f s24, s0, s8
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vldmdb SRC1!, {s20}
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vmul.f s8, s16, s8
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vmls.f s24, s16, s20
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vmla.f s8, s0, s20
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vstmia DST0!, {s24}
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vstmdb DST1!, {s8}
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1:
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tst LEN, #2
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beq 2f
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vldmdb WIN1!, {s0}
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vldmdb WIN1!, {s1}
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vldmia SRC0!, {s8-s9}
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vldmia WIN0!, {s16-s17}
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vmul.f s24, s0, s8
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vmul.f s25, s1, s9
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vldmdb SRC1!, {s20}
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vldmdb SRC1!, {s21}
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vmul.f s8, s16, s8
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vmul.f s9, s17, s9
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vmls.f s24, s16, s20
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vmls.f s25, s17, s21
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vmla.f s8, s0, s20
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vmla.f s9, s1, s21
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vstmia DST0!, {s24-s25}
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vstmdb DST1!, {s8}
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vstmdb DST1!, {s9}
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2:
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tst LEN, #4
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beq 3f
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vldmdb WIN1!, {s0}
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vldmdb WIN1!, {s1}
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vldmdb WIN1!, {s2}
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vldmdb WIN1!, {s3}
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vldmia SRC0!, {s8-s11}
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vldmia WIN0!, {s16-s19}
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vmul.f s24, s0, s8
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vmul.f s25, s1, s9
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vmul.f s26, s2, s10
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vmul.f s27, s3, s11
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vldmdb SRC1!, {s20}
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vldmdb SRC1!, {s21}
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vldmdb SRC1!, {s22}
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vldmdb SRC1!, {s23}
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vmul.f s8, s16, s8
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vmul.f s9, s17, s9
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vmul.f s10, s18, s10
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vmul.f s11, s19, s11
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vmls.f s24, s16, s20
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vmls.f s25, s17, s21
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vmls.f s26, s18, s22
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vmls.f s27, s19, s23
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vmla.f s8, s0, s20
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vmla.f s9, s1, s21
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vmla.f s10, s2, s22
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vmla.f s11, s3, s23
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vstmia DST0!, {s24-s27}
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vstmdb DST1!, {s8}
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vstmdb DST1!, {s9}
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vstmdb DST1!, {s10}
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vstmdb DST1!, {s11}
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3:
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bics LEN, LEN, #7
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beq 7f
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4:
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ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1
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fmxr FPSCR, lr
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vldmdb WIN1!, {s0}
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vldmdb WIN1!, {s1}
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vldmdb WIN1!, {s2}
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vldmdb WIN1!, {s3}
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vldmia SRC0!, {s8-s11}
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vldmia WIN0!, {s16-s19}
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vmul.f s24, s0, s8 @ vector * vector
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vldmdb SRC1!, {s20}
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vldmdb SRC1!, {s21}
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vldmdb SRC1!, {s22}
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vldmdb SRC1!, {s23}
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vmul.f s8, s16, s8 @ vector * vector
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vmls.f s24, s16, s20 @ vector * vector
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vldmdb WIN1!, {s4}
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vldmdb WIN1!, {s5}
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vldmdb WIN1!, {s6}
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vldmdb WIN1!, {s7}
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vldmia SRC0!, {s12-s13}
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vmla.f s8, s0, s20 @ vector * vector
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vldmia SRC0!, {s14-s15}
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subs LEN, LEN, #8
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beq 6f
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5: vldmia WIN0!, {s20-s23}
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vmul.f s28, s4, s12 @ vector * vector
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vstmia DST0!, {s24-s25}
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vldmdb SRC1!, {s16}
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vldmdb SRC1!, {s17}
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vldmdb SRC1!, {s18}
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vldmdb SRC1!, {s19}
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vmul.f s12, s20, s12 @ vector * vector
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vstmia DST0!, {s26-s27}
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vstmdb DST1!, {s8}
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vstmdb DST1!, {s9}
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vstmdb DST1!, {s10}
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vstmdb DST1!, {s11}
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vmls.f s28, s20, s16 @ vector * vector
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vldmdb WIN1!, {s0}
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vldmdb WIN1!, {s1}
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vldmdb WIN1!, {s2}
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vldmdb WIN1!, {s3}
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vldmia SRC0!, {s8-s9}
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vmla.f s12, s4, s16 @ vector * vector
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vldmia SRC0!, {s10-s11}
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subs LEN, LEN, #8
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vldmia WIN0!, {s16-s19}
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vmul.f s24, s0, s8 @ vector * vector
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vstmia DST0!, {s28-s29}
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vldmdb SRC1!, {s20}
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vldmdb SRC1!, {s21}
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vldmdb SRC1!, {s22}
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vldmdb SRC1!, {s23}
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vmul.f s8, s16, s8 @ vector * vector
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vstmia DST0!, {s30-s31}
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vstmdb DST1!, {s12}
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vstmdb DST1!, {s13}
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vstmdb DST1!, {s14}
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vstmdb DST1!, {s15}
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vmls.f s24, s16, s20 @ vector * vector
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vldmdb WIN1!, {s4}
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vldmdb WIN1!, {s5}
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vldmdb WIN1!, {s6}
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vldmdb WIN1!, {s7}
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vldmia SRC0!, {s12-s13}
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vmla.f s8, s0, s20 @ vector * vector
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vldmia SRC0!, {s14-s15}
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bne 5b
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6: vldmia WIN0!, {s20-s23}
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vmul.f s28, s4, s12 @ vector * vector
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vstmia DST0!, {s24-s25}
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vldmdb SRC1!, {s16}
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vldmdb SRC1!, {s17}
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vldmdb SRC1!, {s18}
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vldmdb SRC1!, {s19}
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vmul.f s12, s20, s12 @ vector * vector
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vstmia DST0!, {s26-s27}
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vstmdb DST1!, {s8}
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vstmdb DST1!, {s9}
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vstmdb DST1!, {s10}
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vstmdb DST1!, {s11}
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vmls.f s28, s20, s16 @ vector * vector
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vmla.f s12, s4, s16 @ vector * vector
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vstmia DST0!, {s28-s31}
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vstmdb DST1!, {s12}
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vstmdb DST1!, {s13}
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vstmdb DST1!, {s14}
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vstmdb DST1!, {s15}
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7:
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fmxr FPSCR, OLDFPSCR
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vpop {s16-s31}
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pop {v1-v3,pc}
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.unreq DST0
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.unreq SRC0
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.unreq SRC1
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.unreq WIN0
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.unreq LEN
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.unreq OLDFPSCR
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.unreq DST1
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.unreq WIN1
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endfunc
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/**
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/**
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* ARM VFP optimized implementation of 'vector_fmul_reverse_c' function.
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* ARM VFP optimized implementation of 'vector_fmul_reverse_c' function.
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* Assume that len is a positive number and is multiple of 8
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* Assume that len is a positive number and is multiple of 8
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