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avcodec/nvenc: surface allocation reduction
This patch aims to reduce the number of input/output surfaces NVENC allocates per session. Previous default sets allocated surfaces to 32 (unless there is user specified param or lookahead involved). Having large number of surfaces consumes extra video memory (esp for higher resolution encoding). The patch changes the surfaces calculation for default, B-frames, lookahead scenario respectively. The other change involves surface selection. Previously, if a session allocates x surfaces, only x-1 surfaces are used (due to combination of output delay and lock toggle logic). To prevent unused surfaces, changing surface rotation to using predefined fifo. Signed-off-by: Timo Rothenpieler <timo@rothenpieler.org>
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78a5fc4579
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8de3458a07
@ -644,16 +644,34 @@ static void nvenc_override_rate_control(AVCodecContext *avctx)
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static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
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{
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NvencContext *ctx = avctx->priv_data;
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int nb_surfaces = 0;
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// default minimum of 4 surfaces
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// multiply by 2 for number of NVENCs on gpu (hardcode to 2)
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// another multiply by 2 to avoid blocking next PBB group
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int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
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// lookahead enabled
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if (ctx->rc_lookahead > 0) {
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nb_surfaces = ctx->rc_lookahead + ((ctx->encode_config.frameIntervalP > 0) ? ctx->encode_config.frameIntervalP : 0) + 1 + 4;
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if (ctx->nb_surfaces < nb_surfaces) {
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// +1 is to account for lkd_bound calculation later
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// +4 is to allow sufficient pipelining with lookahead
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nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
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if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
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{
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av_log(avctx, AV_LOG_WARNING,
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"Defined rc_lookahead requires more surfaces, "
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"increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
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ctx->nb_surfaces = nb_surfaces;
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}
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ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
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} else {
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if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
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{
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av_log(avctx, AV_LOG_WARNING,
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"Defined b-frame requires more surfaces, "
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"increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
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ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
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}
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else if (ctx->nb_surfaces <= 0)
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ctx->nb_surfaces = nb_surfaces;
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// otherwise use user specified value
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}
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ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
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@ -1086,6 +1104,7 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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NvencContext *ctx = avctx->priv_data;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
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NvencSurface* tmp_surface = &ctx->surfaces[idx];
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NVENCSTATUS nv_status;
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NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
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@ -1121,8 +1140,6 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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ctx->surfaces[idx].height = allocSurf.height;
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}
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ctx->surfaces[idx].lockCount = 0;
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/* 1MB is large enough to hold most output frames.
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* NVENC increases this automaticaly if it is not enough. */
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allocOut.size = 1024 * 1024;
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@ -1141,6 +1158,8 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
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ctx->surfaces[idx].size = allocOut.size;
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av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
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return 0;
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}
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@ -1156,6 +1175,11 @@ static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
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ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
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if (!ctx->timestamp_list)
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return AVERROR(ENOMEM);
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ctx->unused_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
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if (!ctx->unused_surface_queue)
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return AVERROR(ENOMEM);
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ctx->output_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
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if (!ctx->output_surface_queue)
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return AVERROR(ENOMEM);
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@ -1222,6 +1246,7 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
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av_fifo_freep(&ctx->timestamp_list);
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av_fifo_freep(&ctx->output_surface_ready_queue);
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av_fifo_freep(&ctx->output_surface_queue);
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av_fifo_freep(&ctx->unused_surface_queue);
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if (ctx->surfaces && avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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for (i = 0; i < ctx->nb_surfaces; ++i) {
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@ -1305,16 +1330,14 @@ av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
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static NvencSurface *get_free_frame(NvencContext *ctx)
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{
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int i;
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NvencSurface *tmp_surf;
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for (i = 0; i < ctx->nb_surfaces; i++) {
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if (!ctx->surfaces[i].lockCount) {
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ctx->surfaces[i].lockCount = 1;
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return &ctx->surfaces[i];
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}
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}
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if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
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// queue empty
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return NULL;
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return NULL;
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av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
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return tmp_surf;
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}
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static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
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@ -1712,7 +1735,6 @@ int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt,
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}
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if (res) {
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inSurf->lockCount = 0;
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return res;
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}
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@ -1790,8 +1812,7 @@ int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt,
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if (res)
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return res;
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av_assert0(tmpoutsurf->lockCount);
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tmpoutsurf->lockCount--;
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av_fifo_generic_write(ctx->unused_surface_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
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*got_packet = 1;
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} else {
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@ -44,7 +44,6 @@ typedef struct NvencSurface
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NV_ENC_OUTPUT_PTR output_surface;
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NV_ENC_BUFFER_FORMAT format;
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int size;
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int lockCount;
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} NvencSurface;
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typedef struct NvencDynLoadFunctions
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@ -110,6 +109,7 @@ typedef struct NvencContext
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int nb_surfaces;
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NvencSurface *surfaces;
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AVFifoBuffer *unused_surface_queue;
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AVFifoBuffer *output_surface_queue;
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AVFifoBuffer *output_surface_ready_queue;
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AVFifoBuffer *timestamp_list;
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@ -79,8 +79,8 @@ static const AVOption options[] = {
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0, AV_OPT_TYPE_CONST, { .i64 = NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP }, 0, 0, VE, "rc" },
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{ "vbr_2pass", "Multi-pass variable bitrate mode", 0, AV_OPT_TYPE_CONST, { .i64 = NV_ENC_PARAMS_RC_2_PASS_VBR }, 0, 0, VE, "rc" },
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{ "rc-lookahead", "Number of frames to look ahead for rate-control",
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OFFSET(rc_lookahead), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, VE },
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{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 32 }, 0, MAX_REGISTERED_FRAMES, VE },
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OFFSET(rc_lookahead), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
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{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, MAX_REGISTERED_FRAMES, VE },
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{ "cbr", "Use cbr encoding mode", OFFSET(cbr), AV_OPT_TYPE_BOOL, { .i64 = 0 }, 0, 1, VE },
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{ "2pass", "Use 2pass encoding mode", OFFSET(twopass), AV_OPT_TYPE_BOOL, { .i64 = -1 }, -1, 1, VE },
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{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.",
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@ -78,8 +78,8 @@ static const AVOption options[] = {
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0, AV_OPT_TYPE_CONST, { .i64 = NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP }, 0, 0, VE, "rc" },
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{ "vbr_2pass", "Multi-pass variable bitrate mode", 0, AV_OPT_TYPE_CONST, { .i64 = NV_ENC_PARAMS_RC_2_PASS_VBR }, 0, 0, VE, "rc" },
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{ "rc-lookahead", "Number of frames to look ahead for rate-control",
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OFFSET(rc_lookahead), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, VE },
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{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 32 }, 0, MAX_REGISTERED_FRAMES, VE },
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OFFSET(rc_lookahead), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
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{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, MAX_REGISTERED_FRAMES, VE },
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{ "cbr", "Use cbr encoding mode", OFFSET(cbr), AV_OPT_TYPE_BOOL, { .i64 = 0 }, 0, 1, VE },
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{ "2pass", "Use 2pass encoding mode", OFFSET(twopass), AV_OPT_TYPE_BOOL, { .i64 = -1 }, -1, 1, VE },
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{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.",
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