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ARM: improve FASTDIV asm
This uses one register less. Also add missing "cc" clobber. Signed-off-by: Mans Rullgard <mans@mansr.com>
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@ -33,12 +33,12 @@
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#define FASTDIV FASTDIV
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static av_always_inline av_const int FASTDIV(int a, int b)
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{
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int r, t;
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__asm__ ("cmp %3, #2 \n\t"
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"ldr %1, [%4, %3, lsl #2] \n\t"
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"lsrle %0, %2, #1 \n\t"
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"smmulgt %0, %1, %2 \n\t"
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: "=&r"(r), "=&r"(t) : "r"(a), "r"(b), "r"(ff_inverse));
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int r;
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__asm__ ("cmp %2, #2 \n\t"
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"ldr %0, [%3, %2, lsl #2] \n\t"
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"lsrle %0, %1, #1 \n\t"
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"smmulgt %0, %0, %1 \n\t"
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: "=&r"(r) : "r"(a), "r"(b), "r"(ff_inverse) : "cc");
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return r;
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}
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