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ARM: NEON optimised h264_idct_add
Originally committed as revision 16150 to svn://svn.ffmpeg.org/ffmpeg/trunk
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@ -451,6 +451,7 @@ OBJS-$(HAVE_IWMMXT) += armv4l/dsputil_iwmmxt.o \
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OBJS-$(HAVE_NEON) += armv4l/dsputil_neon.o \
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armv4l/dsputil_neon_s.o \
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armv4l/h264dsp_neon.o \
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armv4l/h264idct_neon.o \
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armv4l/simple_idct_neon.o \
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OBJS-$(ARCH_BFIN) += bfin/dsputil_bfin.o \
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@ -92,6 +92,8 @@ void ff_h264_v_loop_filter_chroma_neon(uint8_t *pix, int stride, int alpha,
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void ff_h264_h_loop_filter_chroma_neon(uint8_t *pix, int stride, int alpha,
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int beta, int8_t *tc0);
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void ff_h264_idct_add_neon(uint8_t *dst, DCTELEM *block, int stride);
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void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
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{
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c->put_pixels_tab[0][0] = ff_put_pixels16_neon;
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@ -160,4 +162,6 @@ void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
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c->h264_h_loop_filter_luma = ff_h264_h_loop_filter_luma_neon;
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c->h264_v_loop_filter_chroma = ff_h264_v_loop_filter_chroma_neon;
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c->h264_h_loop_filter_chroma = ff_h264_h_loop_filter_chroma_neon;
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c->h264_idct_add = ff_h264_idct_add_neon;
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}
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77
libavcodec/armv4l/h264idct_neon.S
Normal file
77
libavcodec/armv4l/h264idct_neon.S
Normal file
@ -0,0 +1,77 @@
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/*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "asm.S"
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.fpu neon
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.text
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function ff_h264_idct_add_neon, export=1
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mov r3, #(1<<5)
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vmov.i16 d16, #0
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vmov.16 d16[0], r3
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vld1.64 {d0-d3}, [r1,:128]
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vadd.i16 d0, d0, d16
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vswp d1, d2
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vadd.i16 d4, d0, d1
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vshr.s16 q8, q1, #1
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vsub.i16 d5, d0, d1
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vadd.i16 d6, d2, d17
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vsub.i16 d7, d16, d3
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vadd.i16 q0, q2, q3
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vsub.i16 q1, q2, q3
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vtrn.16 d0, d1
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vtrn.16 d3, d2
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vtrn.32 d0, d3
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vtrn.32 d1, d2
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vadd.i16 d4, d0, d3
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vld1.32 {d18[0]}, [r0,:32], r2
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vswp d1, d3
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vshr.s16 q8, q1, #1
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vld1.32 {d19[1]}, [r0,:32], r2
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vsub.i16 d5, d0, d1
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vld1.32 {d18[1]}, [r0,:32], r2
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vadd.i16 d6, d16, d3
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vld1.32 {d19[0]}, [r0,:32], r2
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vsub.i16 d7, d2, d17
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sub r0, r0, r2, lsl #2
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vadd.i16 q0, q2, q3
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vsub.i16 q1, q2, q3
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vshr.s16 q0, q0, #6
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vshr.s16 q1, q1, #6
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vaddw.u8 q0, q0, d18
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vaddw.u8 q1, q1, d19
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vqmovun.s16 d0, q0
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vqmovun.s16 d1, q1
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vst1.32 {d0[0]}, [r0,:32], r2
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vst1.32 {d1[1]}, [r0,:32], r2
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vst1.32 {d0[1]}, [r0,:32], r2
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vst1.32 {d1[0]}, [r0,:32], r2
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bx lr
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.endfunc
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