mirror of
https://github.com/xenia-project/FFmpeg.git
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f0b7882ceb
The .text section is already 16-byte aligned by default on all supported platforms so `SECTION_TEXT` isn't any different from `SECTION .text`.
494 lines
12 KiB
NASM
494 lines
12 KiB
NASM
;******************************************************************************
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;* 32 point SSE-optimized DCT transform
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;* Copyright (c) 2010 Vitor Sessak
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 32
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align 32
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ps_cos_vec: dd 0.500603, 0.505471, 0.515447, 0.531043
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dd 0.553104, 0.582935, 0.622504, 0.674808
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dd -10.190008, -3.407609, -2.057781, -1.484165
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dd -1.169440, -0.972568, -0.839350, -0.744536
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dd 0.502419, 0.522499, 0.566944, 0.646822
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dd 0.788155, 1.060678, 1.722447, 5.101149
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dd 0.509796, 0.601345, 0.899976, 2.562916
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dd 0.509796, 0.601345, 0.899976, 2.562916
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dd 1.000000, 1.000000, 1.306563, 0.541196
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dd 1.000000, 1.000000, 1.306563, 0.541196
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dd 1.000000, 0.707107, 1.000000, -0.707107
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dd 1.000000, 0.707107, 1.000000, -0.707107
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dd 0.707107, 0.707107, 0.707107, 0.707107
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align 32
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ps_p1p1m1m1: dd 0, 0, 0x80000000, 0x80000000, 0, 0, 0x80000000, 0x80000000
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%macro BUTTERFLY 4
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subps %4, %1, %2
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addps %2, %2, %1
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mulps %1, %4, %3
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%endmacro
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%macro BUTTERFLY0 5
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%if cpuflag(sse2) && notcpuflag(avx)
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pshufd %4, %1, %5
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xorps %1, %2
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addps %1, %4
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mulps %1, %3
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%else
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shufps %4, %1, %1, %5
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xorps %1, %1, %2
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addps %4, %4, %1
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mulps %1, %4, %3
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%endif
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%endmacro
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%macro BUTTERFLY2 4
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BUTTERFLY0 %1, %2, %3, %4, 0x1b
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%endmacro
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%macro BUTTERFLY3 4
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BUTTERFLY0 %1, %2, %3, %4, 0xb1
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%endmacro
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%macro BUTTERFLY3V 5
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movaps m%5, m%1
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addps m%1, m%2
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subps m%5, m%2
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SWAP %2, %5
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mulps m%2, [ps_cos_vec+192]
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movaps m%5, m%3
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addps m%3, m%4
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subps m%4, m%5
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mulps m%4, [ps_cos_vec+192]
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%endmacro
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%macro PASS6_AND_PERMUTE 0
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mov tmpd, [outq+4]
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movss m7, [outq+72]
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addss m7, [outq+76]
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movss m3, [outq+56]
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addss m3, [outq+60]
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addss m4, m3
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movss m2, [outq+52]
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addss m2, m3
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movss m3, [outq+104]
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addss m3, [outq+108]
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addss m1, m3
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addss m5, m4
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movss [outq+ 16], m1
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movss m1, [outq+100]
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addss m1, m3
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movss m3, [outq+40]
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movss [outq+ 48], m1
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addss m3, [outq+44]
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movss m1, [outq+100]
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addss m4, m3
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addss m3, m2
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addss m1, [outq+108]
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movss [outq+ 40], m3
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addss m2, [outq+36]
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movss m3, [outq+8]
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movss [outq+ 56], m2
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addss m3, [outq+12]
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movss [outq+ 32], m3
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movss m3, [outq+80]
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movss [outq+ 8], m5
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movss [outq+ 80], m1
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movss m2, [outq+52]
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movss m5, [outq+120]
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addss m5, [outq+124]
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movss m1, [outq+64]
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addss m2, [outq+60]
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addss m0, m5
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addss m5, [outq+116]
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mov [outq+64], tmpd
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addss m6, m0
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addss m1, m6
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mov tmpd, [outq+12]
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mov [outq+ 96], tmpd
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movss [outq+ 4], m1
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movss m1, [outq+24]
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movss [outq+ 24], m4
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movss m4, [outq+88]
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addss m4, [outq+92]
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addss m3, m4
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addss m4, [outq+84]
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mov tmpd, [outq+108]
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addss m1, [outq+28]
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addss m0, m1
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addss m1, m5
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addss m6, m3
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addss m3, m0
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addss m0, m7
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addss m5, [outq+20]
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addss m7, m1
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movss [outq+ 12], m6
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mov [outq+112], tmpd
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movss m6, [outq+28]
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movss [outq+ 28], m0
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movss m0, [outq+36]
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movss [outq+ 36], m7
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addss m1, m4
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movss m7, [outq+116]
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addss m0, m2
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addss m7, [outq+124]
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movss [outq+ 72], m0
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movss m0, [outq+44]
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addss m2, m0
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movss [outq+ 44], m1
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movss [outq+ 88], m2
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addss m0, [outq+60]
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mov tmpd, [outq+60]
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mov [outq+120], tmpd
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movss [outq+104], m0
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addss m4, m5
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addss m5, [outq+68]
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movss [outq+52], m4
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movss [outq+60], m5
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movss m4, [outq+68]
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movss m5, [outq+20]
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movss [outq+ 20], m3
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addss m5, m7
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addss m7, m6
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addss m4, m5
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movss m2, [outq+84]
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addss m2, [outq+92]
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addss m5, m2
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movss [outq+ 68], m4
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addss m2, m7
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movss m4, [outq+76]
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movss [outq+ 84], m2
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movss [outq+ 76], m5
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addss m7, m4
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addss m6, [outq+124]
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addss m4, m6
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addss m6, [outq+92]
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movss [outq+100], m4
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movss [outq+108], m6
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movss m6, [outq+92]
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movss [outq+92], m7
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addss m6, [outq+124]
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movss [outq+116], m6
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%endmacro
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INIT_YMM avx
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SECTION .text
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%if HAVE_AVX_EXTERNAL
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; void ff_dct32_float_avx(FFTSample *out, const FFTSample *in)
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cglobal dct32_float, 2,3,8, out, in, tmp
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; pass 1
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vmovaps m4, [inq+0]
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vinsertf128 m5, m5, [inq+96], 1
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vinsertf128 m5, m5, [inq+112], 0
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vshufps m5, m5, m5, 0x1b
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BUTTERFLY m4, m5, [ps_cos_vec], m6
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vmovaps m2, [inq+64]
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vinsertf128 m6, m6, [inq+32], 1
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vinsertf128 m6, m6, [inq+48], 0
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vshufps m6, m6, m6, 0x1b
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BUTTERFLY m2, m6, [ps_cos_vec+32], m0
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; pass 2
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BUTTERFLY m5, m6, [ps_cos_vec+64], m0
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BUTTERFLY m4, m2, [ps_cos_vec+64], m7
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; pass 3
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vperm2f128 m3, m6, m4, 0x31
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vperm2f128 m1, m6, m4, 0x20
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vshufps m3, m3, m3, 0x1b
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BUTTERFLY m1, m3, [ps_cos_vec+96], m6
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vperm2f128 m4, m5, m2, 0x20
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vperm2f128 m5, m5, m2, 0x31
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vshufps m5, m5, m5, 0x1b
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BUTTERFLY m4, m5, [ps_cos_vec+96], m6
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; pass 4
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vmovaps m6, [ps_p1p1m1m1+0]
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vmovaps m2, [ps_cos_vec+128]
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BUTTERFLY2 m5, m6, m2, m7
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BUTTERFLY2 m4, m6, m2, m7
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BUTTERFLY2 m1, m6, m2, m7
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BUTTERFLY2 m3, m6, m2, m7
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; pass 5
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vshufps m6, m6, m6, 0xcc
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vmovaps m2, [ps_cos_vec+160]
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BUTTERFLY3 m5, m6, m2, m7
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BUTTERFLY3 m4, m6, m2, m7
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BUTTERFLY3 m1, m6, m2, m7
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BUTTERFLY3 m3, m6, m2, m7
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vperm2f128 m6, m3, m3, 0x31
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vmovaps [outq], m3
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vextractf128 [outq+64], m5, 1
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vextractf128 [outq+32], m5, 0
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vextractf128 [outq+80], m4, 1
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vextractf128 [outq+48], m4, 0
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vperm2f128 m0, m1, m1, 0x31
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vmovaps [outq+96], m1
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vzeroupper
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; pass 6, no SIMD...
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INIT_XMM
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PASS6_AND_PERMUTE
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RET
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%endif
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%if ARCH_X86_64
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%define SPILL SWAP
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%define UNSPILL SWAP
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%macro PASS5 0
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nop ; FIXME code alignment
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SWAP 5, 8
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SWAP 4, 12
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SWAP 6, 14
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SWAP 7, 13
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SWAP 0, 15
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PERMUTE 9,10, 10,12, 11,14, 12,9, 13,11, 14,13
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TRANSPOSE4x4PS 8, 9, 10, 11, 0
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BUTTERFLY3V 8, 9, 10, 11, 0
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addps m10, m11
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TRANSPOSE4x4PS 12, 13, 14, 15, 0
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BUTTERFLY3V 12, 13, 14, 15, 0
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addps m14, m15
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addps m12, m14
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addps m14, m13
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addps m13, m15
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%endmacro
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%macro PASS6 0
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SWAP 9, 12
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SWAP 11, 14
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movss [outq+0x00], m8
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pshuflw m0, m8, 0xe
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movss [outq+0x10], m9
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pshuflw m1, m9, 0xe
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movss [outq+0x20], m10
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pshuflw m2, m10, 0xe
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movss [outq+0x30], m11
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pshuflw m3, m11, 0xe
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movss [outq+0x40], m12
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pshuflw m4, m12, 0xe
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movss [outq+0x50], m13
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pshuflw m5, m13, 0xe
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movss [outq+0x60], m14
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pshuflw m6, m14, 0xe
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movaps [outq+0x70], m15
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pshuflw m7, m15, 0xe
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addss m0, m1
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addss m1, m2
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movss [outq+0x08], m0
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addss m2, m3
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movss [outq+0x18], m1
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addss m3, m4
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movss [outq+0x28], m2
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addss m4, m5
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movss [outq+0x38], m3
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addss m5, m6
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movss [outq+0x48], m4
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addss m6, m7
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movss [outq+0x58], m5
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movss [outq+0x68], m6
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movss [outq+0x78], m7
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PERMUTE 1,8, 3,9, 5,10, 7,11, 9,12, 11,13, 13,14, 8,1, 10,3, 12,5, 14,7
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movhlps m0, m1
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pshufd m1, m1, 3
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SWAP 0, 2, 4, 6, 8, 10, 12, 14
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SWAP 1, 3, 5, 7, 9, 11, 13, 15
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%rep 7
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movhlps m0, m1
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pshufd m1, m1, 3
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addss m15, m1
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SWAP 0, 2, 4, 6, 8, 10, 12, 14
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SWAP 1, 3, 5, 7, 9, 11, 13, 15
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%endrep
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%assign i 4
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%rep 15
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addss m0, m1
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movss [outq+i], m0
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SWAP 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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%assign i i+8
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%endrep
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%endmacro
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%else ; ARCH_X86_32
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%macro SPILL 2 ; xmm#, mempos
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movaps [outq+(%2-8)*16], m%1
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%endmacro
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%macro UNSPILL 2
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movaps m%1, [outq+(%2-8)*16]
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%endmacro
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%define PASS6 PASS6_AND_PERMUTE
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%macro PASS5 0
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movaps m2, [ps_cos_vec+160]
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shufps m3, m3, 0xcc
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BUTTERFLY3 m5, m3, m2, m1
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SPILL 5, 8
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UNSPILL 1, 9
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BUTTERFLY3 m1, m3, m2, m5
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SPILL 1, 14
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BUTTERFLY3 m4, m3, m2, m5
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SPILL 4, 12
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BUTTERFLY3 m7, m3, m2, m5
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SPILL 7, 13
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UNSPILL 5, 10
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BUTTERFLY3 m5, m3, m2, m7
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SPILL 5, 10
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UNSPILL 4, 11
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BUTTERFLY3 m4, m3, m2, m7
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SPILL 4, 11
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BUTTERFLY3 m6, m3, m2, m7
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SPILL 6, 9
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BUTTERFLY3 m0, m3, m2, m7
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SPILL 0, 15
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%endmacro
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%endif
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; void ff_dct32_float_sse(FFTSample *out, const FFTSample *in)
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%macro DCT32_FUNC 0
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cglobal dct32_float, 2, 3, 16, out, in, tmp
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; pass 1
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movaps m0, [inq+0]
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LOAD_INV m1, [inq+112]
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BUTTERFLY m0, m1, [ps_cos_vec], m3
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movaps m7, [inq+64]
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LOAD_INV m4, [inq+48]
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BUTTERFLY m7, m4, [ps_cos_vec+32], m3
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; pass 2
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movaps m2, [ps_cos_vec+64]
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BUTTERFLY m1, m4, m2, m3
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SPILL 1, 11
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SPILL 4, 8
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; pass 1
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movaps m1, [inq+16]
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LOAD_INV m6, [inq+96]
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BUTTERFLY m1, m6, [ps_cos_vec+16], m3
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movaps m4, [inq+80]
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LOAD_INV m5, [inq+32]
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BUTTERFLY m4, m5, [ps_cos_vec+48], m3
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; pass 2
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BUTTERFLY m0, m7, m2, m3
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movaps m2, [ps_cos_vec+80]
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BUTTERFLY m6, m5, m2, m3
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BUTTERFLY m1, m4, m2, m3
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; pass 3
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movaps m2, [ps_cos_vec+96]
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shufps m1, m1, 0x1b
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BUTTERFLY m0, m1, m2, m3
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SPILL 0, 15
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SPILL 1, 14
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UNSPILL 0, 8
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shufps m5, m5, 0x1b
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BUTTERFLY m0, m5, m2, m3
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UNSPILL 1, 11
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shufps m6, m6, 0x1b
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BUTTERFLY m1, m6, m2, m3
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SPILL 1, 11
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shufps m4, m4, 0x1b
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BUTTERFLY m7, m4, m2, m3
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; pass 4
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movaps m3, [ps_p1p1m1m1+0]
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movaps m2, [ps_cos_vec+128]
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BUTTERFLY2 m5, m3, m2, m1
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BUTTERFLY2 m0, m3, m2, m1
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SPILL 0, 9
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BUTTERFLY2 m6, m3, m2, m1
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SPILL 6, 10
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UNSPILL 0, 11
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BUTTERFLY2 m0, m3, m2, m1
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SPILL 0, 11
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BUTTERFLY2 m4, m3, m2, m1
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BUTTERFLY2 m7, m3, m2, m1
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UNSPILL 6, 14
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BUTTERFLY2 m6, m3, m2, m1
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UNSPILL 0, 15
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BUTTERFLY2 m0, m3, m2, m1
|
|
|
|
PASS5
|
|
PASS6
|
|
RET
|
|
%endmacro
|
|
|
|
%macro LOAD_INV 2
|
|
%if cpuflag(sse2)
|
|
pshufd %1, %2, 0x1b
|
|
%elif cpuflag(sse)
|
|
movaps %1, %2
|
|
shufps %1, %1, 0x1b
|
|
%endif
|
|
%endmacro
|
|
|
|
%if ARCH_X86_32
|
|
INIT_XMM sse
|
|
DCT32_FUNC
|
|
%endif
|
|
|
|
INIT_XMM sse2
|
|
DCT32_FUNC
|