mirror of
https://github.com/xenia-project/FFmpeg.git
synced 2024-11-28 14:01:27 +00:00
72254b19b8
Signed-off-by: James Almer <jamrial@gmail.com>
134 lines
3.5 KiB
NASM
134 lines
3.5 KiB
NASM
;******************************************************************************
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;* ALAC DSP SIMD optimizations
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;*
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;* Copyright (C) 2015 James Almer
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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INIT_XMM sse4
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%if ARCH_X86_64
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cglobal alac_decorrelate_stereo, 2, 5, 8, buf0, len, shift, weight, buf1
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%else
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cglobal alac_decorrelate_stereo, 2, 3, 8, buf0, len, shift, weight
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%define buf1q r2q
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%endif
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movd m6, shiftm
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movd m7, weightm
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SPLATD m7
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shl lend, 2
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mov buf1q, [buf0q + gprsize]
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mov buf0q, [buf0q]
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add buf1q, lenq
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add buf0q, lenq
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neg lenq
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align 16
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.loop:
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mova m0, [buf0q + lenq]
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mova m1, [buf0q + lenq + mmsize]
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mova m2, [buf1q + lenq]
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mova m3, [buf1q + lenq + mmsize]
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pmulld m4, m2, m7
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pmulld m5, m3, m7
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psrad m4, m6
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psrad m5, m6
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psubd m0, m4
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psubd m1, m5
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paddd m2, m0
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paddd m3, m1
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mova [buf1q + lenq], m0
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mova [buf1q + lenq + mmsize], m1
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mova [buf0q + lenq], m2
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mova [buf0q + lenq + mmsize], m3
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add lenq, mmsize*2
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jl .loop
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RET
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INIT_XMM sse2
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cglobal alac_append_extra_bits_stereo, 2, 5, 5, buf0, exbuf0, buf1, exbuf1, len
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movifnidn lend, lenm
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movd m4, r2m ; exbits
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shl lend, 2
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mov buf1q, [buf0q + gprsize]
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mov buf0q, [buf0q]
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mov exbuf1q, [exbuf0q + gprsize]
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mov exbuf0q, [exbuf0q]
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add buf1q, lenq
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add buf0q, lenq
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add exbuf1q, lenq
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add exbuf0q, lenq
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neg lenq
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align 16
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.loop:
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mova m0, [buf0q + lenq]
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mova m1, [buf0q + lenq + mmsize]
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pslld m0, m4
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pslld m1, m4
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mova m2, [buf1q + lenq]
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mova m3, [buf1q + lenq + mmsize]
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pslld m2, m4
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pslld m3, m4
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por m0, [exbuf0q + lenq]
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por m1, [exbuf0q + lenq + mmsize]
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por m2, [exbuf1q + lenq]
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por m3, [exbuf1q + lenq + mmsize]
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mova [buf0q + lenq ], m0
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mova [buf0q + lenq + mmsize], m1
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mova [buf1q + lenq ], m2
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mova [buf1q + lenq + mmsize], m3
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add lenq, mmsize*2
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jl .loop
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REP_RET
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%if ARCH_X86_64
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cglobal alac_append_extra_bits_mono, 2, 5, 3, buf, exbuf, exbits, ch, len
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%else
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cglobal alac_append_extra_bits_mono, 2, 3, 3, buf, exbuf, len
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%define exbitsm r2m
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%endif
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movifnidn lend, r4m
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movd m2, exbitsm
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shl lend, 2
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mov bufq, [bufq]
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mov exbufq, [exbufq]
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add bufq, lenq
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add exbufq, lenq
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neg lenq
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align 16
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.loop:
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mova m0, [bufq + lenq]
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mova m1, [bufq + lenq + mmsize]
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pslld m0, m2
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pslld m1, m2
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por m0, [exbufq + lenq]
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por m1, [exbufq + lenq + mmsize]
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mova [bufq + lenq], m0
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mova [bufq + lenq + mmsize], m1
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add lenq, mmsize*2
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jl .loop
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REP_RET
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