mirror of
https://github.com/xenia-project/FFmpeg.git
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5e826fd65e
All our ARM asm preserves alignment so setting this attribute in a common location is simpler. This removes numerous warnings when linking with armcc. Signed-off-by: Mans Rullgard <mans@mansr.com>
620 lines
20 KiB
ArmAsm
620 lines
20 KiB
ArmAsm
/*
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* Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/arm/asm.S"
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.macro call_2x_pixels type, subp
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function ff_\type\()_pixels16\subp\()_armv6, export=1
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push {r0-r3, lr}
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bl ff_\type\()_pixels8\subp\()_armv6
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pop {r0-r3, lr}
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add r0, r0, #8
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add r1, r1, #8
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b ff_\type\()_pixels8\subp\()_armv6
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endfunc
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.endm
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call_2x_pixels avg
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call_2x_pixels put, _x2
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call_2x_pixels put, _y2
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call_2x_pixels put, _x2_no_rnd
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call_2x_pixels put, _y2_no_rnd
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function ff_put_pixels16_armv6, export=1
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push {r4-r11}
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1:
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ldr r5, [r1, #4]
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ldr r6, [r1, #8]
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ldr r7, [r1, #12]
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ldr_post r4, r1, r2
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strd r6, r7, [r0, #8]
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ldr r9, [r1, #4]
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strd_post r4, r5, r0, r2
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ldr r10, [r1, #8]
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ldr r11, [r1, #12]
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ldr_post r8, r1, r2
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strd r10, r11, [r0, #8]
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subs r3, r3, #2
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strd_post r8, r9, r0, r2
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bne 1b
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pop {r4-r11}
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bx lr
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endfunc
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function ff_put_pixels8_armv6, export=1
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push {r4-r7}
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1:
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ldr r5, [r1, #4]
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ldr_post r4, r1, r2
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ldr r7, [r1, #4]
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strd_post r4, r5, r0, r2
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ldr_post r6, r1, r2
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subs r3, r3, #2
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strd_post r6, r7, r0, r2
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bne 1b
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pop {r4-r7}
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bx lr
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endfunc
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function ff_put_pixels8_x2_armv6, export=1
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push {r4-r11, lr}
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mov r12, #1
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orr r12, r12, r12, lsl #8
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orr r12, r12, r12, lsl #16
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1:
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ldr r4, [r1]
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subs r3, r3, #2
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ldr r5, [r1, #4]
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ldr r7, [r1, #5]
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lsr r6, r4, #8
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ldr_pre r8, r1, r2
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orr r6, r6, r5, lsl #24
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ldr r9, [r1, #4]
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ldr r11, [r1, #5]
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lsr r10, r8, #8
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add r1, r1, r2
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orr r10, r10, r9, lsl #24
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eor r14, r4, r6
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uhadd8 r4, r4, r6
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eor r6, r5, r7
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uhadd8 r5, r5, r7
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and r14, r14, r12
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and r6, r6, r12
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uadd8 r4, r4, r14
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eor r14, r8, r10
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uadd8 r5, r5, r6
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eor r6, r9, r11
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uhadd8 r8, r8, r10
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and r14, r14, r12
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uhadd8 r9, r9, r11
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and r6, r6, r12
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uadd8 r8, r8, r14
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strd_post r4, r5, r0, r2
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uadd8 r9, r9, r6
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strd_post r8, r9, r0, r2
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bne 1b
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pop {r4-r11, pc}
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endfunc
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function ff_put_pixels8_y2_armv6, export=1
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push {r4-r11}
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mov r12, #1
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orr r12, r12, r12, lsl #8
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orr r12, r12, r12, lsl #16
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ldr r4, [r1]
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ldr r5, [r1, #4]
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ldr_pre r6, r1, r2
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ldr r7, [r1, #4]
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1:
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subs r3, r3, #2
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uhadd8 r8, r4, r6
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eor r10, r4, r6
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uhadd8 r9, r5, r7
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eor r11, r5, r7
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and r10, r10, r12
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ldr_pre r4, r1, r2
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uadd8 r8, r8, r10
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and r11, r11, r12
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uadd8 r9, r9, r11
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ldr r5, [r1, #4]
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uhadd8 r10, r4, r6
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eor r6, r4, r6
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uhadd8 r11, r5, r7
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and r6, r6, r12
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eor r7, r5, r7
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uadd8 r10, r10, r6
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and r7, r7, r12
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ldr_pre r6, r1, r2
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uadd8 r11, r11, r7
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strd_post r8, r9, r0, r2
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ldr r7, [r1, #4]
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strd_post r10, r11, r0, r2
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bne 1b
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pop {r4-r11}
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bx lr
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endfunc
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function ff_put_pixels8_x2_no_rnd_armv6, export=1
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push {r4-r9, lr}
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1:
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subs r3, r3, #2
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ldr r4, [r1]
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ldr r5, [r1, #4]
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ldr r7, [r1, #5]
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ldr_pre r8, r1, r2
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ldr r9, [r1, #4]
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ldr r14, [r1, #5]
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add r1, r1, r2
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lsr r6, r4, #8
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orr r6, r6, r5, lsl #24
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lsr r12, r8, #8
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orr r12, r12, r9, lsl #24
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uhadd8 r4, r4, r6
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uhadd8 r5, r5, r7
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uhadd8 r8, r8, r12
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uhadd8 r9, r9, r14
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stm r0, {r4,r5}
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add r0, r0, r2
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stm r0, {r8,r9}
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add r0, r0, r2
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bne 1b
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pop {r4-r9, pc}
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endfunc
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function ff_put_pixels8_y2_no_rnd_armv6, export=1
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push {r4-r9, lr}
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ldr r4, [r1]
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ldr r5, [r1, #4]
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ldr_pre r6, r1, r2
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ldr r7, [r1, #4]
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1:
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subs r3, r3, #2
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uhadd8 r8, r4, r6
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ldr_pre r4, r1, r2
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uhadd8 r9, r5, r7
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ldr r5, [r1, #4]
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uhadd8 r12, r4, r6
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ldr_pre r6, r1, r2
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uhadd8 r14, r5, r7
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ldr r7, [r1, #4]
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stm r0, {r8,r9}
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add r0, r0, r2
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stm r0, {r12,r14}
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add r0, r0, r2
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bne 1b
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pop {r4-r9, pc}
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endfunc
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function ff_avg_pixels8_armv6, export=1
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pld [r1, r2]
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push {r4-r10, lr}
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mov lr, #1
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orr lr, lr, lr, lsl #8
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orr lr, lr, lr, lsl #16
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ldrd r4, r5, [r0]
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ldr r10, [r1, #4]
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ldr_post r9, r1, r2
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subs r3, r3, #2
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1:
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pld [r1, r2]
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eor r8, r4, r9
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uhadd8 r4, r4, r9
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eor r12, r5, r10
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ldrd_reg r6, r7, r0, r2
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uhadd8 r5, r5, r10
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and r8, r8, lr
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ldr r10, [r1, #4]
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and r12, r12, lr
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uadd8 r4, r4, r8
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ldr_post r9, r1, r2
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eor r8, r6, r9
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uadd8 r5, r5, r12
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pld [r1, r2, lsl #1]
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eor r12, r7, r10
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uhadd8 r6, r6, r9
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strd_post r4, r5, r0, r2
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uhadd8 r7, r7, r10
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beq 2f
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and r8, r8, lr
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ldrd_reg r4, r5, r0, r2
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uadd8 r6, r6, r8
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ldr r10, [r1, #4]
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and r12, r12, lr
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subs r3, r3, #2
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uadd8 r7, r7, r12
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ldr_post r9, r1, r2
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strd_post r6, r7, r0, r2
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b 1b
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2:
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and r8, r8, lr
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and r12, r12, lr
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uadd8 r6, r6, r8
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uadd8 r7, r7, r12
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strd_post r6, r7, r0, r2
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pop {r4-r10, pc}
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endfunc
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function ff_add_pixels_clamped_armv6, export=1
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push {r4-r8,lr}
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mov r3, #8
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1:
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ldm r0!, {r4,r5,r12,lr}
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ldrd r6, r7, [r1]
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pkhbt r8, r4, r5, lsl #16
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pkhtb r5, r5, r4, asr #16
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pkhbt r4, r12, lr, lsl #16
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pkhtb lr, lr, r12, asr #16
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pld [r1, r2]
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uxtab16 r8, r8, r6
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uxtab16 r5, r5, r6, ror #8
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uxtab16 r4, r4, r7
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uxtab16 lr, lr, r7, ror #8
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usat16 r8, #8, r8
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usat16 r5, #8, r5
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usat16 r4, #8, r4
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usat16 lr, #8, lr
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orr r6, r8, r5, lsl #8
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orr r7, r4, lr, lsl #8
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subs r3, r3, #1
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strd_post r6, r7, r1, r2
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bgt 1b
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pop {r4-r8,pc}
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endfunc
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function ff_get_pixels_armv6, export=1
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pld [r1, r2]
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push {r4-r8, lr}
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mov lr, #8
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1:
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ldrd_post r4, r5, r1, r2
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subs lr, lr, #1
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uxtb16 r6, r4
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uxtb16 r4, r4, ror #8
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uxtb16 r12, r5
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uxtb16 r8, r5, ror #8
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pld [r1, r2]
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pkhbt r5, r6, r4, lsl #16
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pkhtb r6, r4, r6, asr #16
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pkhbt r7, r12, r8, lsl #16
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pkhtb r12, r8, r12, asr #16
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stm r0!, {r5,r6,r7,r12}
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bgt 1b
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pop {r4-r8, pc}
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endfunc
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function ff_diff_pixels_armv6, export=1
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pld [r1, r3]
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pld [r2, r3]
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push {r4-r9, lr}
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mov lr, #8
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1:
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ldrd_post r4, r5, r1, r3
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ldrd_post r6, r7, r2, r3
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uxtb16 r8, r4
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uxtb16 r4, r4, ror #8
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uxtb16 r9, r6
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uxtb16 r6, r6, ror #8
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pld [r1, r3]
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ssub16 r9, r8, r9
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ssub16 r6, r4, r6
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uxtb16 r8, r5
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uxtb16 r5, r5, ror #8
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pld [r2, r3]
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pkhbt r4, r9, r6, lsl #16
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pkhtb r6, r6, r9, asr #16
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uxtb16 r9, r7
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uxtb16 r7, r7, ror #8
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ssub16 r9, r8, r9
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ssub16 r5, r5, r7
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subs lr, lr, #1
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pkhbt r8, r9, r5, lsl #16
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pkhtb r9, r5, r9, asr #16
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stm r0!, {r4,r6,r8,r9}
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bgt 1b
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pop {r4-r9, pc}
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endfunc
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function ff_pix_abs16_armv6, export=1
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ldr r0, [sp]
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push {r4-r9, lr}
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mov r12, #0
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mov lr, #0
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ldm r1, {r4-r7}
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ldr r8, [r2]
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1:
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ldr r9, [r2, #4]
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pld [r1, r3]
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usada8 r12, r4, r8, r12
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ldr r8, [r2, #8]
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pld [r2, r3]
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usada8 lr, r5, r9, lr
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ldr r9, [r2, #12]
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usada8 r12, r6, r8, r12
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subs r0, r0, #1
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usada8 lr, r7, r9, lr
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beq 2f
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add r1, r1, r3
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ldm r1, {r4-r7}
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add r2, r2, r3
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ldr r8, [r2]
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b 1b
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2:
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add r0, r12, lr
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pop {r4-r9, pc}
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endfunc
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function ff_pix_abs16_x2_armv6, export=1
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ldr r12, [sp]
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push {r4-r11, lr}
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mov r0, #0
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mov lr, #1
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orr lr, lr, lr, lsl #8
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orr lr, lr, lr, lsl #16
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1:
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ldr r8, [r2]
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ldr r9, [r2, #4]
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lsr r10, r8, #8
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ldr r4, [r1]
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lsr r6, r9, #8
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orr r10, r10, r9, lsl #24
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ldr r5, [r2, #8]
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eor r11, r8, r10
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uhadd8 r7, r8, r10
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orr r6, r6, r5, lsl #24
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and r11, r11, lr
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uadd8 r7, r7, r11
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ldr r8, [r1, #4]
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usada8 r0, r4, r7, r0
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eor r7, r9, r6
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lsr r10, r5, #8
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and r7, r7, lr
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uhadd8 r4, r9, r6
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ldr r6, [r2, #12]
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uadd8 r4, r4, r7
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pld [r1, r3]
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orr r10, r10, r6, lsl #24
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usada8 r0, r8, r4, r0
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ldr r4, [r1, #8]
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eor r11, r5, r10
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ldrb r7, [r2, #16]
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and r11, r11, lr
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uhadd8 r8, r5, r10
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ldr r5, [r1, #12]
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uadd8 r8, r8, r11
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pld [r2, r3]
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lsr r10, r6, #8
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usada8 r0, r4, r8, r0
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orr r10, r10, r7, lsl #24
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subs r12, r12, #1
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eor r11, r6, r10
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add r1, r1, r3
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uhadd8 r9, r6, r10
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and r11, r11, lr
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uadd8 r9, r9, r11
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add r2, r2, r3
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usada8 r0, r5, r9, r0
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bgt 1b
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pop {r4-r11, pc}
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endfunc
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.macro usad_y2 p0, p1, p2, p3, n0, n1, n2, n3
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ldr \n0, [r2]
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eor \n1, \p0, \n0
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uhadd8 \p0, \p0, \n0
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and \n1, \n1, lr
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ldr \n2, [r1]
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uadd8 \p0, \p0, \n1
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ldr \n1, [r2, #4]
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usada8 r0, \p0, \n2, r0
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pld [r1, r3]
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eor \n3, \p1, \n1
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uhadd8 \p1, \p1, \n1
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and \n3, \n3, lr
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ldr \p0, [r1, #4]
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uadd8 \p1, \p1, \n3
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ldr \n2, [r2, #8]
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usada8 r0, \p1, \p0, r0
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pld [r2, r3]
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eor \p0, \p2, \n2
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uhadd8 \p2, \p2, \n2
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and \p0, \p0, lr
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ldr \p1, [r1, #8]
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uadd8 \p2, \p2, \p0
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ldr \n3, [r2, #12]
|
|
usada8 r0, \p2, \p1, r0
|
|
eor \p1, \p3, \n3
|
|
uhadd8 \p3, \p3, \n3
|
|
and \p1, \p1, lr
|
|
ldr \p0, [r1, #12]
|
|
uadd8 \p3, \p3, \p1
|
|
add r1, r1, r3
|
|
usada8 r0, \p3, \p0, r0
|
|
add r2, r2, r3
|
|
.endm
|
|
|
|
function ff_pix_abs16_y2_armv6, export=1
|
|
pld [r1]
|
|
pld [r2]
|
|
ldr r12, [sp]
|
|
push {r4-r11, lr}
|
|
mov r0, #0
|
|
mov lr, #1
|
|
orr lr, lr, lr, lsl #8
|
|
orr lr, lr, lr, lsl #16
|
|
ldr r4, [r2]
|
|
ldr r5, [r2, #4]
|
|
ldr r6, [r2, #8]
|
|
ldr r7, [r2, #12]
|
|
add r2, r2, r3
|
|
1:
|
|
usad_y2 r4, r5, r6, r7, r8, r9, r10, r11
|
|
subs r12, r12, #2
|
|
usad_y2 r8, r9, r10, r11, r4, r5, r6, r7
|
|
bgt 1b
|
|
|
|
pop {r4-r11, pc}
|
|
endfunc
|
|
|
|
function ff_pix_abs8_armv6, export=1
|
|
pld [r2, r3]
|
|
ldr r12, [sp]
|
|
push {r4-r9, lr}
|
|
mov r0, #0
|
|
mov lr, #0
|
|
ldrd_post r4, r5, r1, r3
|
|
1:
|
|
subs r12, r12, #2
|
|
ldr r7, [r2, #4]
|
|
ldr_post r6, r2, r3
|
|
ldrd_post r8, r9, r1, r3
|
|
usada8 r0, r4, r6, r0
|
|
pld [r2, r3]
|
|
usada8 lr, r5, r7, lr
|
|
ldr r7, [r2, #4]
|
|
ldr_post r6, r2, r3
|
|
beq 2f
|
|
ldrd_post r4, r5, r1, r3
|
|
usada8 r0, r8, r6, r0
|
|
pld [r2, r3]
|
|
usada8 lr, r9, r7, lr
|
|
b 1b
|
|
2:
|
|
usada8 r0, r8, r6, r0
|
|
usada8 lr, r9, r7, lr
|
|
add r0, r0, lr
|
|
pop {r4-r9, pc}
|
|
endfunc
|
|
|
|
function ff_sse16_armv6, export=1
|
|
ldr r12, [sp]
|
|
push {r4-r9, lr}
|
|
mov r0, #0
|
|
1:
|
|
ldrd r4, r5, [r1]
|
|
ldr r8, [r2]
|
|
uxtb16 lr, r4
|
|
uxtb16 r4, r4, ror #8
|
|
uxtb16 r9, r8
|
|
uxtb16 r8, r8, ror #8
|
|
ldr r7, [r2, #4]
|
|
usub16 lr, lr, r9
|
|
usub16 r4, r4, r8
|
|
smlad r0, lr, lr, r0
|
|
uxtb16 r6, r5
|
|
uxtb16 lr, r5, ror #8
|
|
uxtb16 r8, r7
|
|
uxtb16 r9, r7, ror #8
|
|
smlad r0, r4, r4, r0
|
|
ldrd r4, r5, [r1, #8]
|
|
usub16 r6, r6, r8
|
|
usub16 r8, lr, r9
|
|
ldr r7, [r2, #8]
|
|
smlad r0, r6, r6, r0
|
|
uxtb16 lr, r4
|
|
uxtb16 r4, r4, ror #8
|
|
uxtb16 r9, r7
|
|
uxtb16 r7, r7, ror #8
|
|
smlad r0, r8, r8, r0
|
|
ldr r8, [r2, #12]
|
|
usub16 lr, lr, r9
|
|
usub16 r4, r4, r7
|
|
smlad r0, lr, lr, r0
|
|
uxtb16 r6, r5
|
|
uxtb16 r5, r5, ror #8
|
|
uxtb16 r9, r8
|
|
uxtb16 r8, r8, ror #8
|
|
smlad r0, r4, r4, r0
|
|
usub16 r6, r6, r9
|
|
usub16 r5, r5, r8
|
|
smlad r0, r6, r6, r0
|
|
add r1, r1, r3
|
|
add r2, r2, r3
|
|
subs r12, r12, #1
|
|
smlad r0, r5, r5, r0
|
|
bgt 1b
|
|
|
|
pop {r4-r9, pc}
|
|
endfunc
|
|
|
|
function ff_pix_norm1_armv6, export=1
|
|
push {r4-r6, lr}
|
|
mov r12, #16
|
|
mov lr, #0
|
|
1:
|
|
ldm r0, {r2-r5}
|
|
uxtb16 r6, r2
|
|
uxtb16 r2, r2, ror #8
|
|
smlad lr, r6, r6, lr
|
|
uxtb16 r6, r3
|
|
smlad lr, r2, r2, lr
|
|
uxtb16 r3, r3, ror #8
|
|
smlad lr, r6, r6, lr
|
|
uxtb16 r6, r4
|
|
smlad lr, r3, r3, lr
|
|
uxtb16 r4, r4, ror #8
|
|
smlad lr, r6, r6, lr
|
|
uxtb16 r6, r5
|
|
smlad lr, r4, r4, lr
|
|
uxtb16 r5, r5, ror #8
|
|
smlad lr, r6, r6, lr
|
|
subs r12, r12, #1
|
|
add r0, r0, r1
|
|
smlad lr, r5, r5, lr
|
|
bgt 1b
|
|
|
|
mov r0, lr
|
|
pop {r4-r6, pc}
|
|
endfunc
|
|
|
|
function ff_pix_sum_armv6, export=1
|
|
push {r4-r7, lr}
|
|
mov r12, #16
|
|
mov r2, #0
|
|
mov r3, #0
|
|
mov lr, #0
|
|
ldr r4, [r0]
|
|
1:
|
|
subs r12, r12, #1
|
|
ldr r5, [r0, #4]
|
|
usada8 r2, r4, lr, r2
|
|
ldr r6, [r0, #8]
|
|
usada8 r3, r5, lr, r3
|
|
ldr r7, [r0, #12]
|
|
usada8 r2, r6, lr, r2
|
|
beq 2f
|
|
ldr_pre r4, r0, r1
|
|
usada8 r3, r7, lr, r3
|
|
bgt 1b
|
|
2:
|
|
usada8 r3, r7, lr, r3
|
|
add r0, r2, r3
|
|
pop {r4-r7, pc}
|
|
endfunc
|