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https://github.com/xenia-project/FFmpeg.git
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5d5f8b29b4
* commit 'f56d8d8dd72b1ab52aa814c5a0fccabf8040ef68': h264: aarch64: intra prediction optimisations Conflicts: libavcodec/h264pred.c Merged-by: Michael Niedermayer <michael@niedermayer.cc>
362 lines
13 KiB
ArmAsm
362 lines
13 KiB
ArmAsm
/*
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* Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/aarch64/asm.S"
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.macro ldcol.8 rd, rs, rt, n=8, hi=0
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.if \n >= 8 || \hi == 0
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ld1 {\rd\().b}[0], [\rs], \rt
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ld1 {\rd\().b}[1], [\rs], \rt
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ld1 {\rd\().b}[2], [\rs], \rt
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ld1 {\rd\().b}[3], [\rs], \rt
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.endif
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.if \n >= 8 || \hi == 1
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ld1 {\rd\().b}[4], [\rs], \rt
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ld1 {\rd\().b}[5], [\rs], \rt
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ld1 {\rd\().b}[6], [\rs], \rt
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ld1 {\rd\().b}[7], [\rs], \rt
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.endif
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.if \n == 16
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ld1 {\rd\().b}[8], [\rs], \rt
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ld1 {\rd\().b}[9], [\rs], \rt
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ld1 {\rd\().b}[10], [\rs], \rt
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ld1 {\rd\().b}[11], [\rs], \rt
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ld1 {\rd\().b}[12], [\rs], \rt
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ld1 {\rd\().b}[13], [\rs], \rt
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ld1 {\rd\().b}[14], [\rs], \rt
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ld1 {\rd\().b}[15], [\rs], \rt
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.endif
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.endm
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function ff_pred16x16_128_dc_neon, export=1
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movi v0.16b, #128
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b .L_pred16x16_dc_end
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endfunc
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function ff_pred16x16_top_dc_neon, export=1
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sub x2, x0, x1
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ld1 {v0.16b}, [x2]
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uaddlv h0, v0.16b
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rshrn v0.8b, v0.8h, #4
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dup v0.16b, v0.b[0]
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b .L_pred16x16_dc_end
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endfunc
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function ff_pred16x16_left_dc_neon, export=1
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sub x2, x0, #1
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ldcol.8 v0, x2, x1, 16
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uaddlv h0, v0.16b
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rshrn v0.8b, v0.8h, #4
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dup v0.16b, v0.b[0]
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b .L_pred16x16_dc_end
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endfunc
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function ff_pred16x16_dc_neon, export=1
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sub x2, x0, x1
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sub x3, x0, #1
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ld1 {v0.16b}, [x2]
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ldcol.8 v1, x3, x1, 16
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uaddlv h0, v0.16b
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uaddlv h1, v1.16b
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add v0.4h, v0.4h, v1.4h
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rshrn v0.8b, v0.8h, #5
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dup v0.16b, v0.b[0]
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.L_pred16x16_dc_end:
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mov w3, #8
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6: st1 {v0.16b}, [x0], x1
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st1 {v0.16b}, [x0], x1
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subs w3, w3, #1
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b.ne 6b
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ret
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endfunc
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function ff_pred16x16_hor_neon, export=1
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sub x2, x0, #1
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mov w3, #16
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1: ld1r {v0.16b}, [x2], x1
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st1 {v0.16b}, [x0], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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function ff_pred16x16_vert_neon, export=1
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sub x2, x0, x1
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add x1, x1, x1
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ld1 {v0.16b}, [x2], x1
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mov w3, #8
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1: st1 {v0.16b}, [x0], x1
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st1 {v0.16b}, [x2], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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function ff_pred16x16_plane_neon, export=1
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sub x3, x0, x1
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movrel x4, p16weight
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add x2, x3, #8
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sub x3, x3, #1
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ld1 {v0.8b}, [x3]
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ld1 {v2.8b}, [x2], x1
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ldcol.8 v1, x3, x1
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add x3, x3, x1
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ldcol.8 v3, x3, x1
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rev64 v0.8b, v0.8b
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rev64 v1.8b, v1.8b
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uaddl v7.8h, v2.8b, v3.8b
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usubl v2.8h, v2.8b, v0.8b
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usubl v3.8h, v3.8b, v1.8b
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ld1 {v0.8h}, [x4]
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mul v2.8h, v2.8h, v0.8h
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mul v3.8h, v3.8h, v0.8h
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addp v2.8h, v2.8h, v3.8h
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addp v2.8h, v2.8h, v2.8h
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addp v2.4h, v2.4h, v2.4h
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sshll v3.4s, v2.4h, #2
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saddw v2.4s, v3.4s, v2.4h
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rshrn v4.4h, v2.4s, #6
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trn2 v5.4h, v4.4h, v4.4h
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add v2.4h, v4.4h, v5.4h
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shl v3.4h, v2.4h, #3
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ext v7.16b, v7.16b, v7.16b, #14
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sub v3.4h, v3.4h, v2.4h // 7 * (b + c)
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add v7.4h, v7.4h, v0.4h
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shl v2.4h, v7.4h, #4
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sub v2.4h, v2.4h, v3.4h
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shl v3.4h, v4.4h, #4
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ext v0.16b, v0.16b, v0.16b, #14
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sub v6.4h, v5.4h, v3.4h
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mov v0.h[0], wzr
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mul v0.8h, v0.8h, v4.h[0]
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dup v1.8h, v2.h[0]
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dup v2.8h, v4.h[0]
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dup v3.8h, v6.h[0]
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shl v2.8h, v2.8h, #3
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add v1.8h, v1.8h, v0.8h
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add v3.8h, v3.8h, v2.8h
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mov w3, #16
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1:
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sqshrun v0.8b, v1.8h, #5
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add v1.8h, v1.8h, v2.8h
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sqshrun2 v0.16b, v1.8h, #5
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add v1.8h, v1.8h, v3.8h
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st1 {v0.16b}, [x0], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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const p16weight, align=4
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.short 1,2,3,4,5,6,7,8
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endconst
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const p8weight, align=4
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.short 1,2,3,4,1,2,3,4
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endconst
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function ff_pred8x8_hor_neon, export=1
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sub x2, x0, #1
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mov w3, #8
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1: ld1r {v0.8b}, [x2], x1
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st1 {v0.8b}, [x0], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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function ff_pred8x8_vert_neon, export=1
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sub x2, x0, x1
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lsl x1, x1, #1
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ld1 {v0.8b}, [x2], x1
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mov w3, #4
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1: st1 {v0.8b}, [x0], x1
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st1 {v0.8b}, [x2], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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function ff_pred8x8_plane_neon, export=1
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sub x3, x0, x1
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movrel x4, p8weight
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movrel x5, p16weight
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add x2, x3, #4
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sub x3, x3, #1
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ld1 {v0.s}[0], [x3]
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ld1 {v2.s}[0], [x2], x1
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ldcol.8 v0, x3, x1, 4, hi=1
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add x3, x3, x1
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ldcol.8 v3, x3, x1, 4
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uaddl v7.8h, v2.8b, v3.8b
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rev32 v0.8b, v0.8b
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trn1 v2.2s, v2.2s, v3.2s
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usubl v2.8h, v2.8b, v0.8b
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ld1 {v6.8h}, [x4]
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mul v2.8h, v2.8h, v6.8h
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ld1 {v0.8h}, [x5]
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saddlp v2.4s, v2.8h
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addp v2.4s, v2.4s, v2.4s
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shl v3.4s, v2.4s, #4
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add v2.4s, v3.4s, v2.4s
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rshrn v5.4h, v2.4s, #5
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addp v2.4h, v5.4h, v5.4h
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shl v3.4h, v2.4h, #1
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add v3.4h, v3.4h, v2.4h
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rev64 v7.4h, v7.4h
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add v7.4h, v7.4h, v0.4h
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shl v2.4h, v7.4h, #4
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sub v2.4h, v2.4h, v3.4h
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ext v0.16b, v0.16b, v0.16b, #14
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mov v0.h[0], wzr
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mul v0.8h, v0.8h, v5.h[0]
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dup v1.8h, v2.h[0]
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dup v2.8h, v5.h[1]
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add v1.8h, v1.8h, v0.8h
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mov w3, #8
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1:
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sqshrun v0.8b, v1.8h, #5
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add v1.8h, v1.8h, v2.8h
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st1 {v0.8b}, [x0], x1
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subs w3, w3, #1
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b.ne 1b
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ret
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endfunc
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function ff_pred8x8_128_dc_neon, export=1
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movi v0.8b, #128
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movi v1.8b, #128
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_top_dc_neon, export=1
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sub x2, x0, x1
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ld1 {v0.8b}, [x2]
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uaddlp v0.4h, v0.8b
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addp v0.4h, v0.4h, v0.4h
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zip1 v0.8h, v0.8h, v0.8h
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rshrn v2.8b, v0.8h, #2
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zip1 v0.8b, v2.8b, v2.8b
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zip1 v1.8b, v2.8b, v2.8b
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_left_dc_neon, export=1
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sub x2, x0, #1
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ldcol.8 v0, x2, x1
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uaddlp v0.4h, v0.8b
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addp v0.4h, v0.4h, v0.4h
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rshrn v2.8b, v0.8h, #2
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dup v1.8b, v2.b[1]
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dup v0.8b, v2.b[0]
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_dc_neon, export=1
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sub x2, x0, x1
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sub x3, x0, #1
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ld1 {v0.8b}, [x2]
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ldcol.8 v1, x3, x1
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uaddlp v0.4h, v0.8b
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uaddlp v1.4h, v1.8b
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trn1 v2.2s, v0.2s, v1.2s
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trn2 v3.2s, v0.2s, v1.2s
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addp v4.4h, v2.4h, v3.4h
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addp v5.4h, v4.4h, v4.4h
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rshrn v6.8b, v5.8h, #3
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rshrn v7.8b, v4.8h, #2
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dup v0.8b, v6.b[0]
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dup v2.8b, v7.b[2]
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dup v1.8b, v7.b[3]
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dup v3.8b, v6.b[1]
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zip1 v0.2s, v0.2s, v2.2s
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zip1 v1.2s, v1.2s, v3.2s
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.L_pred8x8_dc_end:
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mov w3, #4
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add x2, x0, x1, lsl #2
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6: st1 {v0.8b}, [x0], x1
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st1 {v1.8b}, [x2], x1
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subs w3, w3, #1
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b.ne 6b
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ret
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endfunc
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function ff_pred8x8_l0t_dc_neon, export=1
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sub x2, x0, x1
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sub x3, x0, #1
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ld1 {v0.8b}, [x2]
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ldcol.8 v1, x3, x1, 4
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zip1 v0.4s, v0.4s, v1.4s
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uaddlp v0.8h, v0.16b
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addp v0.8h, v0.8h, v0.8h
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addp v1.4h, v0.4h, v0.4h
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rshrn v2.8b, v0.8h, #2
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rshrn v3.8b, v1.8h, #3
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dup v4.8b, v3.b[0]
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dup v6.8b, v2.b[2]
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dup v5.8b, v2.b[0]
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zip1 v0.2s, v4.2s, v6.2s
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zip1 v1.2s, v5.2s, v6.2s
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_l00_dc_neon, export=1
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sub x2, x0, #1
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ldcol.8 v0, x2, x1, 4
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uaddlp v0.4h, v0.8b
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addp v0.4h, v0.4h, v0.4h
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rshrn v0.8b, v0.8h, #2
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movi v1.8b, #128
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dup v0.8b, v0.b[0]
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_0lt_dc_neon, export=1
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add x3, x0, x1, lsl #2
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sub x2, x0, x1
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sub x3, x3, #1
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ld1 {v0.8b}, [x2]
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ldcol.8 v1, x3, x1, 4, hi=1
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zip1 v0.4s, v0.4s, v1.4s
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uaddlp v0.8h, v0.16b
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addp v0.8h, v0.8h, v0.8h
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addp v1.4h, v0.4h, v0.4h
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rshrn v2.8b, v0.8h, #2
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rshrn v3.8b, v1.8h, #3
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dup v4.8b, v2.b[0]
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dup v5.8b, v2.b[3]
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dup v6.8b, v2.b[2]
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dup v7.8b, v3.b[1]
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zip1 v0.2s, v4.2s, v6.2s
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zip1 v1.2s, v5.2s, v7.2s
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b .L_pred8x8_dc_end
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endfunc
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function ff_pred8x8_0l0_dc_neon, export=1
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add x2, x0, x1, lsl #2
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sub x2, x2, #1
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ldcol.8 v1, x2, x1, 4
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uaddlp v2.4h, v1.8b
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addp v2.4h, v2.4h, v2.4h
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rshrn v1.8b, v2.8h, #2
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movi v0.8b, #128
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dup v1.8b, v1.b[0]
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b .L_pred8x8_dc_end
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endfunc
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