mirror of
https://github.com/xenia-project/FFmpeg.git
synced 2024-11-24 03:59:43 +00:00
251 lines
6.0 KiB
NASM
251 lines
6.0 KiB
NASM
;******************************************************************************
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;* Copyright (c) 2012 Michael Niedermayer
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 32
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dw1: times 8 dd 1
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w1 : times 16 dw 1
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SECTION .text
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%macro MIX2_FLT 1
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cglobal mix_2_1_%1_float, 7, 7, 6, out, in1, in2, coeffp, index1, index2, len
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%ifidn %1, a
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test in1q, mmsize-1
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jne mix_2_1_float_u_int %+ SUFFIX
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test in2q, mmsize-1
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jne mix_2_1_float_u_int %+ SUFFIX
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test outq, mmsize-1
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jne mix_2_1_float_u_int %+ SUFFIX
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%else
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mix_2_1_float_u_int %+ SUFFIX:
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%endif
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VBROADCASTSS m4, [coeffpq + 4*index1q]
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VBROADCASTSS m5, [coeffpq + 4*index2q]
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shl lend , 2
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add in1q , lenq
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add in2q , lenq
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add outq , lenq
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neg lenq
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.next:
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%ifidn %1, a
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mulps m0, m4, [in1q + lenq ]
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mulps m1, m5, [in2q + lenq ]
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mulps m2, m4, [in1q + lenq + mmsize]
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mulps m3, m5, [in2q + lenq + mmsize]
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%else
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movu m0, [in1q + lenq ]
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movu m1, [in2q + lenq ]
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movu m2, [in1q + lenq + mmsize]
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movu m3, [in2q + lenq + mmsize]
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mulps m0, m0, m4
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mulps m1, m1, m5
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mulps m2, m2, m4
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mulps m3, m3, m5
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%endif
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addps m0, m0, m1
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addps m2, m2, m3
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mov%1 [outq + lenq ], m0
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mov%1 [outq + lenq + mmsize], m2
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add lenq, mmsize*2
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jl .next
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REP_RET
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%endmacro
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%macro MIX1_FLT 1
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cglobal mix_1_1_%1_float, 5, 5, 3, out, in, coeffp, index, len
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%ifidn %1, a
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test inq, mmsize-1
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jne mix_1_1_float_u_int %+ SUFFIX
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test outq, mmsize-1
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jne mix_1_1_float_u_int %+ SUFFIX
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%else
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mix_1_1_float_u_int %+ SUFFIX:
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%endif
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VBROADCASTSS m2, [coeffpq + 4*indexq]
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shl lenq , 2
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add inq , lenq
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add outq , lenq
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neg lenq
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.next:
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%ifidn %1, a
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mulps m0, m2, [inq + lenq ]
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mulps m1, m2, [inq + lenq + mmsize]
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%else
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movu m0, [inq + lenq ]
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movu m1, [inq + lenq + mmsize]
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mulps m0, m0, m2
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mulps m1, m1, m2
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%endif
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mov%1 [outq + lenq ], m0
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mov%1 [outq + lenq + mmsize], m1
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add lenq, mmsize*2
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jl .next
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REP_RET
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%endmacro
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%macro MIX1_INT16 1
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cglobal mix_1_1_%1_int16, 5, 5, 6, out, in, coeffp, index, len
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%ifidn %1, a
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test inq, mmsize-1
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jne mix_1_1_int16_u_int %+ SUFFIX
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test outq, mmsize-1
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jne mix_1_1_int16_u_int %+ SUFFIX
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%else
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mix_1_1_int16_u_int %+ SUFFIX:
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%endif
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movd m4, [coeffpq + 4*indexq]
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SPLATW m5, m4
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psllq m4, 32
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psrlq m4, 48
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mova m0, [w1]
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psllw m0, m4
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psrlw m0, 1
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punpcklwd m5, m0
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add lenq , lenq
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add inq , lenq
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add outq , lenq
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neg lenq
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.next:
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mov%1 m0, [inq + lenq ]
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mov%1 m2, [inq + lenq + mmsize]
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mova m1, m0
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mova m3, m2
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punpcklwd m0, [w1]
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punpckhwd m1, [w1]
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punpcklwd m2, [w1]
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punpckhwd m3, [w1]
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pmaddwd m0, m5
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pmaddwd m1, m5
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pmaddwd m2, m5
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pmaddwd m3, m5
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psrad m0, m4
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psrad m1, m4
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psrad m2, m4
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psrad m3, m4
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packssdw m0, m1
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packssdw m2, m3
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mov%1 [outq + lenq ], m0
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mov%1 [outq + lenq + mmsize], m2
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add lenq, mmsize*2
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jl .next
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%if mmsize == 8
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emms
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RET
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%else
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REP_RET
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%endif
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%endmacro
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%macro MIX2_INT16 1
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cglobal mix_2_1_%1_int16, 7, 7, 8, out, in1, in2, coeffp, index1, index2, len
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%ifidn %1, a
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test in1q, mmsize-1
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jne mix_2_1_int16_u_int %+ SUFFIX
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test in2q, mmsize-1
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jne mix_2_1_int16_u_int %+ SUFFIX
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test outq, mmsize-1
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jne mix_2_1_int16_u_int %+ SUFFIX
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%else
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mix_2_1_int16_u_int %+ SUFFIX:
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%endif
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movd m4, [coeffpq + 4*index1q]
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movd m6, [coeffpq + 4*index2q]
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SPLATW m5, m4
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SPLATW m6, m6
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psllq m4, 32
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psrlq m4, 48
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mova m7, [dw1]
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pslld m7, m4
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psrld m7, 1
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punpcklwd m5, m6
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add lend , lend
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add in1q , lenq
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add in2q , lenq
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add outq , lenq
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neg lenq
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.next:
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mov%1 m0, [in1q + lenq ]
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mov%1 m2, [in2q + lenq ]
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mova m1, m0
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punpcklwd m0, m2
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punpckhwd m1, m2
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mov%1 m2, [in1q + lenq + mmsize]
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mov%1 m6, [in2q + lenq + mmsize]
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mova m3, m2
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punpcklwd m2, m6
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punpckhwd m3, m6
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pmaddwd m0, m5
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pmaddwd m1, m5
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pmaddwd m2, m5
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pmaddwd m3, m5
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paddd m0, m7
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paddd m1, m7
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paddd m2, m7
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paddd m3, m7
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psrad m0, m4
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psrad m1, m4
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psrad m2, m4
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psrad m3, m4
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packssdw m0, m1
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packssdw m2, m3
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mov%1 [outq + lenq ], m0
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mov%1 [outq + lenq + mmsize], m2
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add lenq, mmsize*2
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jl .next
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%if mmsize == 8
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emms
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RET
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%else
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REP_RET
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%endif
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%endmacro
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INIT_MMX mmx
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MIX1_INT16 u
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MIX1_INT16 a
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MIX2_INT16 u
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MIX2_INT16 a
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INIT_XMM sse
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MIX2_FLT u
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MIX2_FLT a
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MIX1_FLT u
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MIX1_FLT a
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INIT_XMM sse2
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MIX1_INT16 u
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MIX1_INT16 a
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MIX2_INT16 u
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MIX2_INT16 a
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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MIX2_FLT u
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MIX2_FLT a
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MIX1_FLT u
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MIX1_FLT a
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%endif
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