mirror of
https://github.com/xenia-project/FFmpeg.git
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d2ee495fb2
This was done to support gcc 2.95, which is an old legacy compiler that fails to compile the current codebase anyway.
182 lines
6.1 KiB
C
182 lines
6.1 KiB
C
/*
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* MLP DSP functions x86-optimized
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* Copyright (c) 2009 Ramiro Polla
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/x86_cpu.h"
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#include "libavcodec/dsputil.h"
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#include "libavcodec/mlp.h"
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#if HAVE_7REGS
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extern void ff_mlp_firorder_8;
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extern void ff_mlp_firorder_7;
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extern void ff_mlp_firorder_6;
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extern void ff_mlp_firorder_5;
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extern void ff_mlp_firorder_4;
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extern void ff_mlp_firorder_3;
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extern void ff_mlp_firorder_2;
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extern void ff_mlp_firorder_1;
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extern void ff_mlp_firorder_0;
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extern void ff_mlp_iirorder_4;
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extern void ff_mlp_iirorder_3;
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extern void ff_mlp_iirorder_2;
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extern void ff_mlp_iirorder_1;
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extern void ff_mlp_iirorder_0;
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static const void *firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
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&ff_mlp_firorder_2, &ff_mlp_firorder_3,
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&ff_mlp_firorder_4, &ff_mlp_firorder_5,
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&ff_mlp_firorder_6, &ff_mlp_firorder_7,
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&ff_mlp_firorder_8 };
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static const void *iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
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&ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
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&ff_mlp_iirorder_4 };
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#if ARCH_X86_64
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#define MLPMUL(label, offset, offs, offc) \
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LABEL_MANGLE(label)": \n\t" \
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"movslq "offset"+"offs"(%0), %%rax\n\t" \
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"movslq "offset"+"offc"(%1), %%rdx\n\t" \
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"imul %%rdx, %%rax\n\t" \
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"add %%rax, %%rsi\n\t"
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#define FIRMULREG(label, offset, firc)\
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LABEL_MANGLE(label)": \n\t" \
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"movslq "#offset"(%0), %%rax\n\t" \
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"imul %"#firc", %%rax\n\t" \
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"add %%rax, %%rsi\n\t"
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#define CLEAR_ACCUM \
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"xor %%rsi, %%rsi\n\t"
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#define SHIFT_ACCUM \
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"shr %%cl, %%rsi\n\t"
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#define ACCUM "%%rdx"
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#define RESULT "%%rsi"
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#define RESULT32 "%%esi"
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#else /* if ARCH_X86_32 */
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#define MLPMUL(label, offset, offs, offc) \
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LABEL_MANGLE(label)": \n\t" \
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"mov "offset"+"offs"(%0), %%eax\n\t" \
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"imull "offset"+"offc"(%1) \n\t" \
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"add %%eax , %%esi\n\t" \
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"adc %%edx , %%ecx\n\t"
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#define FIRMULREG(label, offset, firc) \
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MLPMUL(label, #offset, "0", "0")
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#define CLEAR_ACCUM \
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"xor %%esi, %%esi\n\t" \
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"xor %%ecx, %%ecx\n\t"
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#define SHIFT_ACCUM \
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"mov %%ecx, %%edx\n\t" \
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"mov %%esi, %%eax\n\t" \
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"movzbl %7 , %%ecx\n\t" \
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"shrd %%cl, %%edx, %%eax\n\t" \
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#define ACCUM "%%edx"
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#define RESULT "%%eax"
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#define RESULT32 "%%eax"
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#endif /* !ARCH_X86_64 */
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#define BINC AV_STRINGIFY(4* MAX_CHANNELS)
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#define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
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#define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
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#define FIRMUL(label, offset) MLPMUL(label, #offset, "0", "0")
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#define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
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static void mlp_filter_channel_x86(int32_t *state, const int32_t *coeff,
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int firorder, int iirorder,
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unsigned int filter_shift, int32_t mask,
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int blocksize, int32_t *sample_buffer)
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{
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const void *firjump = firtable[firorder];
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const void *iirjump = iirtable[iirorder];
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blocksize = -blocksize;
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__asm__ volatile(
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"1: \n\t"
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CLEAR_ACCUM
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"jmp *%5 \n\t"
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FIRMUL (ff_mlp_firorder_8, 0x1c )
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FIRMUL (ff_mlp_firorder_7, 0x18 )
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FIRMUL (ff_mlp_firorder_6, 0x14 )
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FIRMUL (ff_mlp_firorder_5, 0x10 )
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FIRMUL (ff_mlp_firorder_4, 0x0c )
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FIRMULREG(ff_mlp_firorder_3, 0x08,10)
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FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
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FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
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LABEL_MANGLE(ff_mlp_firorder_0)":\n\t"
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"jmp *%6 \n\t"
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IIRMUL (ff_mlp_iirorder_4, 0x0c )
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IIRMUL (ff_mlp_iirorder_3, 0x08 )
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IIRMUL (ff_mlp_iirorder_2, 0x04 )
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IIRMUL (ff_mlp_iirorder_1, 0x00 )
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LABEL_MANGLE(ff_mlp_iirorder_0)":\n\t"
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SHIFT_ACCUM
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"mov "RESULT" ,"ACCUM" \n\t"
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"add (%2) ,"RESULT" \n\t"
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"and %4 ,"RESULT" \n\t"
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"sub $4 , %0 \n\t"
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"mov "RESULT32", (%0) \n\t"
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"mov "RESULT32", (%2) \n\t"
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"add $"BINC" , %2 \n\t"
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"sub "ACCUM" ,"RESULT" \n\t"
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"mov "RESULT32","IOFFS"(%0) \n\t"
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"incl %3 \n\t"
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"js 1b \n\t"
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: /* 0*/"+r"(state),
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/* 1*/"+r"(coeff),
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/* 2*/"+r"(sample_buffer),
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#if ARCH_X86_64
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/* 3*/"+r"(blocksize)
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: /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump),
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/* 6*/"r"(iirjump) , /* 7*/"c"(filter_shift)
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, /* 8*/"r"((int64_t)coeff[0])
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, /* 9*/"r"((int64_t)coeff[1])
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, /*10*/"r"((int64_t)coeff[2])
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: "rax", "rdx", "rsi"
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#else /* ARCH_X86_32 */
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/* 3*/"+m"(blocksize)
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: /* 4*/"m"( mask), /* 5*/"m"(firjump),
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/* 6*/"m"(iirjump) , /* 7*/"m"(filter_shift)
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: "eax", "edx", "esi", "ecx"
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#endif /* !ARCH_X86_64 */
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);
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}
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#endif /* HAVE_7REGS */
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void ff_mlp_init_x86(DSPContext* c, AVCodecContext *avctx)
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{
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#if HAVE_7REGS
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c->mlp_filter_channel = mlp_filter_channel_x86;
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#endif
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}
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