mirror of
https://github.com/xenia-project/FFmpeg.git
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138 lines
6.1 KiB
C
138 lines
6.1 KiB
C
/*
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* Copyright (c) 2010 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVCODEC_ARM_AAC_H
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#define AVCODEC_ARM_AAC_H
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#include "config.h"
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#if HAVE_NEON && HAVE_INLINE_ASM
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#define VMUL2 VMUL2
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static inline float *VMUL2(float *dst, const float *v, unsigned idx,
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const float *scale)
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{
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unsigned v0, v1;
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__asm__ volatile ("ubfx %0, %4, #0, #4 \n\t"
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"ubfx %1, %4, #4, #4 \n\t"
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"ldr %0, [%3, %0, lsl #2] \n\t"
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"ldr %1, [%3, %1, lsl #2] \n\t"
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"vld1.32 {d1[]}, [%5,:32] \n\t"
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"vmov d0, %0, %1 \n\t"
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"vmul.f32 d0, d0, d1 \n\t"
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"vst1.32 {d0}, [%2,:64]! \n\t"
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: "=&r"(v0), "=&r"(v1), "+r"(dst)
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: "r"(v), "r"(idx), "r"(scale)
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: "d0", "d1");
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return dst;
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}
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#define VMUL4 VMUL4
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static inline float *VMUL4(float *dst, const float *v, unsigned idx,
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const float *scale)
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{
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unsigned v0, v1, v2, v3;
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__asm__ volatile ("ubfx %0, %6, #0, #2 \n\t"
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"ubfx %1, %6, #2, #2 \n\t"
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"ldr %0, [%5, %0, lsl #2] \n\t"
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"ubfx %2, %6, #4, #2 \n\t"
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"ldr %1, [%5, %1, lsl #2] \n\t"
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"ubfx %3, %6, #6, #2 \n\t"
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"ldr %2, [%5, %2, lsl #2] \n\t"
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"vmov d0, %0, %1 \n\t"
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"ldr %3, [%5, %3, lsl #2] \n\t"
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"vld1.32 {d2[],d3[]},[%7,:32] \n\t"
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"vmov d1, %2, %3 \n\t"
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"vmul.f32 q0, q0, q1 \n\t"
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"vst1.32 {q0}, [%4,:128]! \n\t"
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: "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst)
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: "r"(v), "r"(idx), "r"(scale)
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: "d0", "d1", "d2", "d3");
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return dst;
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}
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#define VMUL2S VMUL2S
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static inline float *VMUL2S(float *dst, const float *v, unsigned idx,
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unsigned sign, const float *scale)
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{
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unsigned v0, v1, v2, v3;
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__asm__ volatile ("ubfx %0, %6, #0, #4 \n\t"
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"ubfx %1, %6, #4, #4 \n\t"
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"ldr %0, [%5, %0, lsl #2] \n\t"
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"lsl %2, %8, #30 \n\t"
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"ldr %1, [%5, %1, lsl #2] \n\t"
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"lsl %3, %8, #31 \n\t"
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"vmov d0, %0, %1 \n\t"
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"bic %2, %2, #1<<30 \n\t"
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"vld1.32 {d1[]}, [%7,:32] \n\t"
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"vmov d2, %2, %3 \n\t"
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"veor d0, d0, d2 \n\t"
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"vmul.f32 d0, d0, d1 \n\t"
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"vst1.32 {d0}, [%4,:64]! \n\t"
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: "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst)
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: "r"(v), "r"(idx), "r"(scale), "r"(sign)
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: "d0", "d1", "d2");
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return dst;
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}
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#define VMUL4S VMUL4S
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static inline float *VMUL4S(float *dst, const float *v, unsigned idx,
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unsigned sign, const float *scale)
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{
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unsigned v0, v1, v2, v3, nz;
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__asm__ volatile ("vld1.32 {d2[],d3[]},[%9,:32] \n\t"
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"ubfx %0, %8, #0, #2 \n\t"
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"ubfx %1, %8, #2, #2 \n\t"
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"ldr %0, [%7, %0, lsl #2] \n\t"
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"ubfx %2, %8, #4, #2 \n\t"
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"ldr %1, [%7, %1, lsl #2] \n\t"
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"ubfx %3, %8, #6, #2 \n\t"
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"ldr %2, [%7, %2, lsl #2] \n\t"
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"vmov d0, %0, %1 \n\t"
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"ldr %3, [%7, %3, lsl #2] \n\t"
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"lsr %6, %8, #12 \n\t"
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"rbit %6, %6 \n\t"
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"vmov d1, %2, %3 \n\t"
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"lsls %6, %6, #1 \n\t"
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"and %0, %5, #1<<31 \n\t"
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"lslcs %5, %5, #1 \n\t"
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"lsls %6, %6, #1 \n\t"
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"and %1, %5, #1<<31 \n\t"
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"lslcs %5, %5, #1 \n\t"
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"lsls %6, %6, #1 \n\t"
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"and %2, %5, #1<<31 \n\t"
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"lslcs %5, %5, #1 \n\t"
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"vmov d4, %0, %1 \n\t"
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"and %3, %5, #1<<31 \n\t"
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"vmov d5, %2, %3 \n\t"
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"veor q0, q0, q2 \n\t"
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"vmul.f32 q0, q0, q1 \n\t"
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"vst1.32 {q0}, [%4,:128]! \n\t"
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: "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst),
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"+r"(sign), "=r"(nz)
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: "r"(v), "r"(idx), "r"(scale)
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: "d0", "d1", "d2", "d3", "d4", "d5");
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return dst;
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}
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#endif /* HAVE_NEON && HAVE_INLINE_ASM */
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#endif /* AVCODEC_ARM_AAC_H */
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