mirror of
https://github.com/xenia-project/FFmpeg.git
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274 lines
12 KiB
C
274 lines
12 KiB
C
/*
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* Copyright (c) 2001 Michel Lespinasse
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* NOTE: This code is based on GPL code from the libmpeg2 project. The
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* author, Michel Lespinasses, has given explicit permission to release
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* under LGPL as part of FFmpeg.
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*
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* FFmpeg integration by Dieter Shirley
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*
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* This file is a direct copy of the AltiVec IDCT module from the libmpeg2
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* project. I've deleted all of the libmpeg2-specific code, renamed the
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* functions and reordered the function parameters. The only change to the
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* IDCT function itself was to factor out the partial transposition, and to
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* perform a full transpose at the end of the function. */
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#include <stdlib.h>
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#include <string.h>
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#include "config.h"
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#if HAVE_ALTIVEC_H
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#include <altivec.h>
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#endif
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/ppc/cpu.h"
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#include "libavutil/ppc/types_altivec.h"
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#include "libavcodec/idctdsp.h"
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#if HAVE_ALTIVEC
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#define IDCT_HALF \
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/* 1st stage */ \
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t1 = vec_mradds(a1, vx7, vx1); \
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t8 = vec_mradds(a1, vx1, vec_subs(zero, vx7)); \
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t7 = vec_mradds(a2, vx5, vx3); \
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t3 = vec_mradds(ma2, vx3, vx5); \
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\
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/* 2nd stage */ \
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t5 = vec_adds(vx0, vx4); \
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t0 = vec_subs(vx0, vx4); \
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t2 = vec_mradds(a0, vx6, vx2); \
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t4 = vec_mradds(a0, vx2, vec_subs(zero, vx6)); \
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t6 = vec_adds(t8, t3); \
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t3 = vec_subs(t8, t3); \
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t8 = vec_subs(t1, t7); \
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t1 = vec_adds(t1, t7); \
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\
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/* 3rd stage */ \
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t7 = vec_adds(t5, t2); \
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t2 = vec_subs(t5, t2); \
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t5 = vec_adds(t0, t4); \
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t0 = vec_subs(t0, t4); \
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t4 = vec_subs(t8, t3); \
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t3 = vec_adds(t8, t3); \
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\
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/* 4th stage */ \
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vy0 = vec_adds(t7, t1); \
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vy7 = vec_subs(t7, t1); \
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vy1 = vec_mradds(c4, t3, t5); \
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vy6 = vec_mradds(mc4, t3, t5); \
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vy2 = vec_mradds(c4, t4, t0); \
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vy5 = vec_mradds(mc4, t4, t0); \
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vy3 = vec_adds(t2, t6); \
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vy4 = vec_subs(t2, t6)
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#define IDCT \
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vec_s16 vy0, vy1, vy2, vy3, vy4, vy5, vy6, vy7; \
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vec_s16 t0, t1, t2, t3, t4, t5, t6, t7, t8; \
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\
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vec_s16 c4 = vec_splat(constants[0], 0); \
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vec_s16 a0 = vec_splat(constants[0], 1); \
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vec_s16 a1 = vec_splat(constants[0], 2); \
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vec_s16 a2 = vec_splat(constants[0], 3); \
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vec_s16 mc4 = vec_splat(constants[0], 4); \
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vec_s16 ma2 = vec_splat(constants[0], 5); \
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vec_s16 bias = (vec_s16) vec_splat((vec_s32) constants[0], 3); \
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\
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vec_s16 zero = vec_splat_s16(0); \
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vec_u16 shift = vec_splat_u16(4); \
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\
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vec_s16 vx0 = vec_mradds(vec_sl(block[0], shift), constants[1], zero); \
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vec_s16 vx1 = vec_mradds(vec_sl(block[1], shift), constants[2], zero); \
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vec_s16 vx2 = vec_mradds(vec_sl(block[2], shift), constants[3], zero); \
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vec_s16 vx3 = vec_mradds(vec_sl(block[3], shift), constants[4], zero); \
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vec_s16 vx4 = vec_mradds(vec_sl(block[4], shift), constants[1], zero); \
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vec_s16 vx5 = vec_mradds(vec_sl(block[5], shift), constants[4], zero); \
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vec_s16 vx6 = vec_mradds(vec_sl(block[6], shift), constants[3], zero); \
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vec_s16 vx7 = vec_mradds(vec_sl(block[7], shift), constants[2], zero); \
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\
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IDCT_HALF; \
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\
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vx0 = vec_mergeh(vy0, vy4); \
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vx1 = vec_mergel(vy0, vy4); \
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vx2 = vec_mergeh(vy1, vy5); \
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vx3 = vec_mergel(vy1, vy5); \
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vx4 = vec_mergeh(vy2, vy6); \
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vx5 = vec_mergel(vy2, vy6); \
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vx6 = vec_mergeh(vy3, vy7); \
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vx7 = vec_mergel(vy3, vy7); \
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\
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vy0 = vec_mergeh(vx0, vx4); \
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vy1 = vec_mergel(vx0, vx4); \
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vy2 = vec_mergeh(vx1, vx5); \
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vy3 = vec_mergel(vx1, vx5); \
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vy4 = vec_mergeh(vx2, vx6); \
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vy5 = vec_mergel(vx2, vx6); \
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vy6 = vec_mergeh(vx3, vx7); \
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vy7 = vec_mergel(vx3, vx7); \
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\
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vx0 = vec_adds(vec_mergeh(vy0, vy4), bias); \
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vx1 = vec_mergel(vy0, vy4); \
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vx2 = vec_mergeh(vy1, vy5); \
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vx3 = vec_mergel(vy1, vy5); \
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vx4 = vec_mergeh(vy2, vy6); \
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vx5 = vec_mergel(vy2, vy6); \
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vx6 = vec_mergeh(vy3, vy7); \
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vx7 = vec_mergel(vy3, vy7); \
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\
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IDCT_HALF; \
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\
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shift = vec_splat_u16(6); \
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vx0 = vec_sra(vy0, shift); \
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vx1 = vec_sra(vy1, shift); \
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vx2 = vec_sra(vy2, shift); \
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vx3 = vec_sra(vy3, shift); \
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vx4 = vec_sra(vy4, shift); \
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vx5 = vec_sra(vy5, shift); \
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vx6 = vec_sra(vy6, shift); \
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vx7 = vec_sra(vy7, shift)
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static const vec_s16 constants[5] = {
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{ 23170, 13573, 6518, 21895, -23170, -21895, 32, 31 },
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{ 16384, 22725, 21407, 19266, 16384, 19266, 21407, 22725 },
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{ 22725, 31521, 29692, 26722, 22725, 26722, 29692, 31521 },
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{ 21407, 29692, 27969, 25172, 21407, 25172, 27969, 29692 },
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{ 19266, 26722, 25172, 22654, 19266, 22654, 25172, 26722 }
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};
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static void idct_altivec(int16_t *blk)
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{
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vec_s16 *block = (vec_s16 *) blk;
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IDCT;
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block[0] = vx0;
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block[1] = vx1;
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block[2] = vx2;
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block[3] = vx3;
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block[4] = vx4;
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block[5] = vx5;
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block[6] = vx6;
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block[7] = vx7;
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}
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static void idct_put_altivec(uint8_t *dest, int stride, int16_t *blk)
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{
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vec_s16 *block = (vec_s16 *) blk;
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vec_u8 tmp;
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IDCT;
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#define COPY(dest, src) \
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tmp = vec_packsu(src, src); \
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vec_ste((vec_u32) tmp, 0, (unsigned int *) dest); \
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vec_ste((vec_u32) tmp, 4, (unsigned int *) dest)
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COPY(dest, vx0);
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dest += stride;
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COPY(dest, vx1);
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dest += stride;
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COPY(dest, vx2);
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dest += stride;
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COPY(dest, vx3);
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dest += stride;
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COPY(dest, vx4);
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dest += stride;
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COPY(dest, vx5);
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dest += stride;
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COPY(dest, vx6);
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dest += stride;
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COPY(dest, vx7);
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}
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static void idct_add_altivec(uint8_t *dest, int stride, int16_t *blk)
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{
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vec_s16 *block = (vec_s16 *) blk;
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vec_u8 tmp;
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vec_s16 tmp2, tmp3;
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vec_u8 perm0;
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vec_u8 perm1;
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vec_u8 p0, p1, p;
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IDCT;
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#if HAVE_BIGENDIAN
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p0 = vec_lvsl(0, dest);
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p1 = vec_lvsl(stride, dest);
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p = vec_splat_u8(-1);
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perm0 = vec_mergeh(p, p0);
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perm1 = vec_mergeh(p, p1);
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#endif
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#if HAVE_BIGENDIAN
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#define GET_TMP2(dest, prm) \
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tmp = vec_ld(0, dest); \
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tmp2 = (vec_s16) vec_perm(tmp, (vec_u8) zero, prm);
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#else
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#define GET_TMP2(dest, prm) \
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tmp = vec_vsx_ld(0, dest); \
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tmp2 = (vec_s16) vec_mergeh(tmp, (vec_u8) zero)
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#endif
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#define ADD(dest, src, perm) \
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GET_TMP2(dest, perm); \
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tmp3 = vec_adds(tmp2, src); \
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tmp = vec_packsu(tmp3, tmp3); \
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vec_ste((vec_u32) tmp, 0, (unsigned int *) dest); \
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vec_ste((vec_u32) tmp, 4, (unsigned int *) dest)
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ADD(dest, vx0, perm0);
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dest += stride;
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ADD(dest, vx1, perm1);
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dest += stride;
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ADD(dest, vx2, perm0);
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dest += stride;
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ADD(dest, vx3, perm1);
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dest += stride;
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ADD(dest, vx4, perm0);
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dest += stride;
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ADD(dest, vx5, perm1);
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dest += stride;
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ADD(dest, vx6, perm0);
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dest += stride;
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ADD(dest, vx7, perm1);
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}
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#endif /* HAVE_ALTIVEC */
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av_cold void ff_idctdsp_init_ppc(IDCTDSPContext *c, AVCodecContext *avctx,
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unsigned high_bit_depth)
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{
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#if HAVE_ALTIVEC
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if (!PPC_ALTIVEC(av_get_cpu_flags()))
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return;
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if (!high_bit_depth && avctx->lowres == 0) {
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if ((avctx->idct_algo == FF_IDCT_AUTO && !(avctx->flags & CODEC_FLAG_BITEXACT)) ||
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(avctx->idct_algo == FF_IDCT_ALTIVEC)) {
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c->idct = idct_altivec;
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c->idct_add = idct_add_altivec;
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c->idct_put = idct_put_altivec;
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c->perm_type = FF_IDCT_PERM_TRANSPOSE;
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}
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}
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#endif /* HAVE_ALTIVEC */
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}
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