mirror of
https://github.com/xenia-project/xenia.git
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Adding bl (unconditional only).
This commit is contained in:
Ben Vanik
parent
2153256109
commit
eb9b9b0321
@ -63,117 +63,124 @@ namespace x64 {
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// return e.GenerateIndirectionBranch(cia, target, lk, likely_local);
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// }
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// int XeEmitBranchTo(
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// X64Emitter& e, X86Compiler& c, const char* src, uint32_t cia,
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// bool lk, jit_value_t condition) {
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// FunctionBlock* fn_block = e.fn_block();
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int XeEmitBranchTo(
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X64Emitter& e, X86Compiler& c, const char* src, uint32_t cia,
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bool lk, void* condition = NULL) {
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FunctionBlock* fn_block = e.fn_block();
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// // Fast-path for branches to other blocks.
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// // Only valid when not tracing branches.
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// if (!FLAGS_trace_branches &&
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// fn_block->outgoing_type == FunctionBlock::kTargetBlock) {
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// e.branch_to_block_if(fn_block->outgoing_address, condition);
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// return 0;
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// }
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// Fast-path for branches to other blocks.
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// Only valid when not tracing branches.
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if (fn_block->outgoing_type == FunctionBlock::kTargetBlock) {
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if (condition) {
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XEASSERTALWAYS();
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} else {
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//e.TraceBranch(cia);
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//c.jmp(e.GetBlockLabel(fn_block->outgoing_address));
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}
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return 0;
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}
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// // Only branch of conditionals when we have one.
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// jit_label_t post_jump_label = jit_label_undefined;
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// if (condition) {
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// // TODO(benvanik): add debug info for this?
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// // char name[32];
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// // xesnprintfa(name, XECOUNT(name), "loc_%.8X_bcx", i.address);
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// jit_insn_branch_if_not(f, condition, &post_jump_label);
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// }
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// Only branch of conditionals when we have one.
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//jit_label_t post_jump_label = jit_label_undefined;
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if (condition) {
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// TODO(benvanik): add debug info for this?
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// char name[32];
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// xesnprintfa(name, XECOUNT(name), "loc_%.8X_bcx", i.address);
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//jit_insn_branch_if_not(f, condition, &post_jump_label);
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XEASSERTALWAYS();
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}
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// if (FLAGS_trace_branches) {
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// e.TraceBranch(cia);
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// }
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e.TraceBranch(cia);
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// // Get the basic block and switch behavior based on outgoing type.
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// int result = 0;
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// switch (fn_block->outgoing_type) {
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// case FunctionBlock::kTargetBlock:
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// // Taken care of above usually.
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// e.branch_to_block(fn_block->outgoing_address);
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// break;
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// case FunctionBlock::kTargetFunction:
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// {
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// // Spill all registers to memory.
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// // TODO(benvanik): only spill ones used by the target function? Use
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// // calling convention flags on the function to not spill temp
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// // registers?
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// e.SpillRegisters();
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// Get the basic block and switch behavior based on outgoing type.
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int result = 0;
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switch (fn_block->outgoing_type) {
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case FunctionBlock::kTargetBlock:
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// Taken care of above.
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XEASSERTALWAYS();
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result = 1;
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break;
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case FunctionBlock::kTargetFunction:
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{
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// Spill all registers to memory.
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// TODO(benvanik): only spill ones used by the target function? Use
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// calling convention flags on the function to not spill temp
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// registers?
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e.SpillRegisters();
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// XEASSERTNOTNULL(fn_block->outgoing_function);
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// // TODO(benvanik): check to see if this is the last block in the function.
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// // This would enable tail calls/etc.
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// bool is_end = false;
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// if (!lk || is_end) {
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// // Tail. No need to refill the local register values, just return.
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// // We optimize this by passing in the LR from our parent instead of the
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// // next instruction. This allows the return from our callee to pop
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// // all the way up.
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// e.call_function(fn_block->outgoing_function,
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// jit_value_get_param(f, 1), true);
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// jit_insn_return(f, NULL);
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// } else {
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// // Will return here eventually.
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// // Refill registers from state.
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// e.call_function(fn_block->outgoing_function,
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// e.get_uint64(cia + 4), false);
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// e.FillRegisters();
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// }
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// break;
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// }
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// case FunctionBlock::kTargetLR:
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// {
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// // An indirect jump.
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// printf("INDIRECT JUMP VIA LR: %.8X\n", cia);
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// result = XeEmitIndirectBranchTo(e, f, src, cia, lk, kXEPPCRegLR);
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// break;
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// }
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// case FunctionBlock::kTargetCTR:
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// {
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// // An indirect jump.
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// printf("INDIRECT JUMP VIA CTR: %.8X\n", cia);
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// result = XeEmitIndirectBranchTo(e, f, src, cia, lk, kXEPPCRegCTR);
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// break;
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// }
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// default:
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// case FunctionBlock::kTargetNone:
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// XEASSERTALWAYS();
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// result = 1;
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// break;
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// }
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XEASSERTNOTNULL(fn_block->outgoing_function);
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// TODO(benvanik): check to see if this is the last block in the function.
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// This would enable tail calls/etc.
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bool is_end = false;
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if (!lk || is_end) {
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// Tail. No need to refill the local register values, just return.
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// We optimize this by passing in the LR from our parent instead of the
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// next instruction. This allows the return from our callee to pop
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// all the way up.
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e.CallFunction(fn_block->outgoing_function, c.getGpArg(1), true);
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// No ret needed - we jumped!
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} else {
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// Will return here eventually.
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// Refill registers from state.
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GpVar lr(c.newGpVar());
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c.mov(lr, imm(cia + 4));
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e.CallFunction(fn_block->outgoing_function, lr, false);
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e.FillRegisters();
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}
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break;
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}
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case FunctionBlock::kTargetLR:
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{
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// An indirect jump.
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printf("INDIRECT JUMP VIA LR: %.8X\n", cia);
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XEASSERTALWAYS();
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//result = XeEmitIndirectBranchTo(e, c, src, cia, lk, kXEPPCRegLR);
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break;
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}
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case FunctionBlock::kTargetCTR:
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{
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// An indirect jump.
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printf("INDIRECT JUMP VIA CTR: %.8X\n", cia);
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XEASSERTALWAYS();
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//result = XeEmitIndirectBranchTo(e, c, src, cia, lk, kXEPPCRegCTR);
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break;
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}
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default:
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case FunctionBlock::kTargetNone:
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XEASSERTALWAYS();
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result = 1;
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break;
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}
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// if (condition) {
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// jit_insn_label(f, &post_jump_label);
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// }
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if (condition) {
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XEASSERTALWAYS();
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//jit_insn_label(f, &post_jump_label);
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}
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// return result;
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// }
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return result;
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}
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// XEEMITTER(bx, 0x48000000, I )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// // if AA then
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// // NIA <- EXTS(LI || 0b00)
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// // else
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// // NIA <- CIA + EXTS(LI || 0b00)
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// // if LK then
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// // LR <- CIA + 4
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XEEMITTER(bx, 0x48000000, I )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// if AA then
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// NIA <- EXTS(LI || 0b00)
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// else
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// NIA <- CIA + EXTS(LI || 0b00)
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// if LK then
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// LR <- CIA + 4
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// uint32_t nia;
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// if (i.I.AA) {
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// nia = XEEXTS26(i.I.LI << 2);
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// } else {
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// nia = i.address + XEEXTS26(i.I.LI << 2);
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// }
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// if (i.I.LK) {
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// e.update_lr_value(e.get_uint64(i.address + 4));
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// }
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uint32_t nia;
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if (i.I.AA) {
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nia = XEEXTS26(i.I.LI << 2);
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} else {
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nia = i.address + XEEXTS26(i.I.LI << 2);
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}
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if (i.I.LK) {
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e.update_lr_value(imm(i.address + 4));
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}
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// return XeEmitBranchTo(e, f, "bx", i.address, i.I.LK, NULL);
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// }
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return XeEmitBranchTo(e, c, "bx", i.address, i.I.LK);
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}
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// XEEMITTER(bcx, 0x40000000, B )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// // if ¬BO[2] then
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@ -244,7 +251,7 @@ namespace x64 {
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// } else {
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// nia = i.address + XEEXTS26(i.B.BD << 2);
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// }
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// if (XeEmitBranchTo(e, f, "bcx", i.address, i.B.LK, ok)) {
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// if (XeEmitBranchTo(e, c, "bcx", i.address, i.B.LK, ok)) {
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// return 1;
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// }
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@ -287,7 +294,7 @@ namespace x64 {
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// ok = cond_ok;
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// }
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// if (XeEmitBranchTo(e, f, "bcctrx", i.address, i.XL.LK, ok)) {
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// if (XeEmitBranchTo(e, c, "bcctrx", i.address, i.XL.LK, ok)) {
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// return 1;
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// }
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@ -353,7 +360,7 @@ namespace x64 {
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// ok = cond_ok;
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// }
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// if (XeEmitBranchTo(e, f, "bclrx", i.address, i.XL.LK, ok)) {
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// if (XeEmitBranchTo(e, c, "bclrx", i.address, i.XL.LK, ok)) {
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// return 1;
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// }
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@ -657,7 +664,7 @@ XEEMITTER(mtspr, 0x7C0003A6, XFX)(X64Emitter& e, X86Compiler& c, InstrDat
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void X64RegisterEmitCategoryControl() {
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// XEREGISTERINSTR(bx, 0x48000000);
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XEREGISTERINSTR(bx, 0x48000000);
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// XEREGISTERINSTR(bcx, 0x40000000);
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// XEREGISTERINSTR(bcctrx, 0x4C000420);
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// XEREGISTERINSTR(bclrx, 0x4C000020);
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@ -599,25 +599,10 @@ void X64Emitter::GenerateBasicBlock(FunctionBlock* block) {
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// TODO(benvanik): finish up BB
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}
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// int X64Emitter::branch_to_block(uint32_t address) {
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// std::map<uint32_t, jit_label_t>::iterator it = bbs_.find(address);
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// return jit_insn_branch(fn_, &it->second);
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// }
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// int X64Emitter::branch_to_block_if(uint32_t address, jit_value_t value) {
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// std::map<uint32_t, jit_label_t>::iterator it = bbs_.find(address);
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// if (value) {
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// return jit_insn_branch_if(fn_, value, &it->second);
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// } else {
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// return jit_insn_branch(fn_, &it->second);
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// }
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// }
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// int X64Emitter::branch_to_block_if_not(uint32_t address, jit_value_t value) {
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// XEASSERTNOTNULL(value);
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// std::map<uint32_t, jit_label_t>::iterator it = bbs_.find(address);
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// return jit_insn_branch_if_not(fn_, value, &it->second);
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// }
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Label& X64Emitter::GetBlockLabel(uint32_t address) {
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std::map<uint32_t, Label>::iterator it = bbs_.find(address);
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return it->second;
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}
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// int X64Emitter::branch_to_return() {
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// return jit_insn_branch(fn_, &return_block_);
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@ -631,20 +616,44 @@ void X64Emitter::GenerateBasicBlock(FunctionBlock* block) {
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// return jit_insn_branch_if_not(fn_, value, &return_block_);
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// }
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// int X64Emitter::call_function(FunctionSymbol* target_symbol,
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// jit_value_t lr, bool tail) {
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// PrepareFunction(target_symbol);
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// jit_function_t target_fn = (jit_function_t)target_symbol->impl_value;
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// XEASSERTNOTNULL(target_fn);
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// int flags = 0;
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// if (tail) {
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// flags |= JIT_CALL_TAIL;
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// }
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// jit_value_t args[] = {jit_value_get_param(fn_, 0), lr};
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// jit_insn_call(fn_, target_symbol->name(), target_fn, fn_signature_,
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// args, XECOUNT(args), flags);
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// return 1;
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// }
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int X64Emitter::CallFunction(FunctionSymbol* target_symbol,
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GpVar& lr, bool tail) {
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X86Compiler& c = compiler_;
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// Prep the target function.
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// If the target function was small we could try to make the whole thing now.
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PrepareFunction(target_symbol);
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void* target_ptr = target_symbol->impl_value;
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XEASSERTNOTNULL(target_ptr);
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if (tail) {
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// Tail calls are just jumps.
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#if defined(ASMJIT_WINDOWS)
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// Calling convetion: kX86FuncConvX64W
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// Arguments passed as RCX, RDX, R8, R9
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c.alloc(c.getGpArg(0), rcx);
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c.alloc(lr, rdx);
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c.jmp(imm((uint64_t)target_ptr));
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#else
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// Calling convetion: kX86FuncConvX64U
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// Arguments passed as RDI, RSI, RDX, RCX, R8, R9
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c.alloc(c.getGpArg(0), rdi);
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c.alloc(lr, rsi);
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c.jmp(imm((uint64_t)target_ptr));
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#endif // ASMJIT_WINDOWS
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} else {
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// void fn(ppc_state*, uint64_t)
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X86CompilerFuncCall* call = c.call(target_ptr);
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call->setComment(target_symbol->name());
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call->setPrototype(kX86FuncConvDefault,
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FuncBuilder2<void, void*, uint64_t>());
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call->setArgument(0, c.getGpArg(0));
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call->setArgument(1, lr);
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}
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return 0;
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}
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void X64Emitter::TraceKernelCall() {
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X86Compiler& c = compiler_;
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@ -952,21 +961,24 @@ void X64Emitter::FillRegisters() {
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if (FLAGS_annotate_disassembly) {
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c.comment("Filling XER");
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}
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c.mov(locals_.xer, ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, xer), 8));
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c.mov(locals_.xer,
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qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, xer)));
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}
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if (locals_.lr.getId() != kInvalidValue) {
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if (FLAGS_annotate_disassembly) {
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c.comment("Filling LR");
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}
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c.mov(locals_.lr, ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, lr), 8));
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c.mov(locals_.lr,
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qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, lr)));
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}
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if (locals_.ctr.getId() != kInvalidValue) {
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if (FLAGS_annotate_disassembly) {
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c.comment("Filling CTR");
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}
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c.mov(locals_.ctr, ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, ctr), 8));
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c.mov(locals_.ctr,
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qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, ctr)));
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}
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// Fill the split CR values by extracting each one from the CR.
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@ -986,7 +998,7 @@ void X64Emitter::FillRegisters() {
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c.comment("Filling CR");
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}
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cr = c.newGpVar();
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c.mov(cr, ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, cr), 8));
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c.mov(cr, qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, cr)));
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cr_tmp = c.newGpVar();
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}
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// (cr >> 28 - n * 4) & 0xF
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@ -1004,7 +1016,7 @@ void X64Emitter::FillRegisters() {
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c.comment("Filling r%d", n);
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}
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c.mov(locals_.gpr[n],
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ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, r) + 8 * n, 8));
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qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, r) + 8 * n));
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}
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}
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@ -1014,7 +1026,7 @@ void X64Emitter::FillRegisters() {
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c.comment("Filling f%d", n);
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}
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c.mov(locals_.fpr[n],
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ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, f) + 8 * n, 8));
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qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, f) + 8 * n));
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}
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}
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}
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@ -1031,7 +1043,7 @@ void X64Emitter::SpillRegisters() {
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if (FLAGS_annotate_disassembly) {
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c.comment("Spilling XER");
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}
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c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, xer)),
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c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, xer)),
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locals_.xer);
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}
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@ -1039,7 +1051,7 @@ void X64Emitter::SpillRegisters() {
|
||||
if (FLAGS_annotate_disassembly) {
|
||||
c.comment("Spilling LR");
|
||||
}
|
||||
c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, lr)),
|
||||
c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, lr)),
|
||||
locals_.lr);
|
||||
}
|
||||
|
||||
@ -1047,7 +1059,7 @@ void X64Emitter::SpillRegisters() {
|
||||
if (FLAGS_annotate_disassembly) {
|
||||
c.comment("Spilling CTR");
|
||||
}
|
||||
c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, ctr)),
|
||||
c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, ctr)),
|
||||
locals_.ctr);
|
||||
}
|
||||
|
||||
@ -1079,7 +1091,7 @@ void X64Emitter::SpillRegisters() {
|
||||
}
|
||||
}
|
||||
if (cr.getId() != kInvalidValue) {
|
||||
c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, cr)),
|
||||
c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, cr)),
|
||||
cr);
|
||||
}
|
||||
|
||||
@ -1089,7 +1101,7 @@ void X64Emitter::SpillRegisters() {
|
||||
if (FLAGS_annotate_disassembly) {
|
||||
c.comment("Spilling r%d", n);
|
||||
}
|
||||
c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, r) + 8 * n),
|
||||
c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, r) + 8 * n),
|
||||
v);
|
||||
}
|
||||
}
|
||||
@ -1100,7 +1112,7 @@ void X64Emitter::SpillRegisters() {
|
||||
if (FLAGS_annotate_disassembly) {
|
||||
c.comment("Spilling f%d", n);
|
||||
}
|
||||
c.mov(ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, f) + 8 * n),
|
||||
c.mov(qword_ptr(c.getGpArg(0), offsetof(xe_ppc_state_t, f) + 8 * n),
|
||||
v);
|
||||
}
|
||||
}
|
||||
@ -1184,6 +1196,12 @@ void X64Emitter::update_lr_value(GpVar& value) {
|
||||
c.mov(locals_.lr, zero_extend(value, 8));
|
||||
}
|
||||
|
||||
void X64Emitter::update_lr_value(AsmJit::Imm& imm) {
|
||||
X86Compiler& c = compiler_;
|
||||
XEASSERT(locals_.lr.getId() != kInvalidValue);
|
||||
c.mov(locals_.lr, imm);
|
||||
}
|
||||
|
||||
GpVar& X64Emitter::ctr_value() {
|
||||
X86Compiler& c = compiler_;
|
||||
XEASSERT(locals_.ctr.getId() != kInvalidValue);
|
||||
|
||||
@ -41,14 +41,13 @@ public:
|
||||
sdb::FunctionSymbol* symbol();
|
||||
sdb::FunctionBlock* fn_block();
|
||||
|
||||
// int branch_to_block(uint32_t address);
|
||||
// int branch_to_block_if(uint32_t address, jit_value_t value);
|
||||
// int branch_to_block_if_not(uint32_t address, jit_value_t value);
|
||||
AsmJit::Label& GetBlockLabel(uint32_t address);
|
||||
int CallFunction(sdb::FunctionSymbol* target_symbol, AsmJit::GpVar& lr,
|
||||
bool tail);
|
||||
|
||||
// int branch_to_return();
|
||||
// int branch_to_return_if(jit_value_t value);
|
||||
// int branch_to_return_if_not(jit_value_t value);
|
||||
// int call_function(sdb::FunctionSymbol* target_symbol, jit_value_t lr,
|
||||
// bool tail);
|
||||
|
||||
void TraceKernelCall();
|
||||
void TraceUserCall();
|
||||
@ -70,6 +69,7 @@ public:
|
||||
|
||||
AsmJit::GpVar& lr_value();
|
||||
void update_lr_value(AsmJit::GpVar& value);
|
||||
void update_lr_value(AsmJit::Imm& imm);
|
||||
|
||||
AsmJit::GpVar& ctr_value();
|
||||
void update_ctr_value(AsmJit::GpVar& value);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user