Nikilite 5d0f8b1543 [core] Add register handling and SPIR-V pointer ops to GPU backend ...

Introduced register allocation and access methods in sm86.rs, including support for the zero register. Added SPIR-V emitter functions for pointer, variable, load, store, and arithmetic operations in spirv.rs to support register operations and instruction translation.

2025-12-16 23:06:57 +01:00

..

src

[core] Add register handling and SPIR-V pointer ops to GPU backend

2025-12-16 23:06:57 +01:00

build.rs

[*] add contribution docs and refactor core modules

2025-11-18 23:52:55 +01:00

Cargo.toml

[*] fix CI/Windows build and optimize SPIR-V emission

2025-12-16 00:58:25 +01:00