mirror of
https://github.com/CTCaer/switch-l4t-atf.git
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1d204ee4ab
BL2 still uses the STM32 header binary format to be loaded from ROM code. BL32 and BL33 and their respective device tree files are now put together in a FIP file. One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are in charge of removing useless nodes for a given BL. This is done because BL2 and BL32 share the same device tree files base. The previous way of booting is still available, the compilation flag STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files are duplicated and their names modified with _stm32_ to avoid too much switches in the code. Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817 Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
45 lines
967 B
Plaintext
45 lines
967 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2020-2021 - All Rights Reserved
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*/
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/ {
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aliases {
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/delete-property/ mmc0;
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/delete-property/ mmc1;
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};
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cpus {
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/delete-node/ cpu@1;
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};
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/delete-node/ psci;
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soc {
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/delete-node/ usb-otg@49000000;
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/delete-node/ hash@54002000;
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/delete-node/ memory-controller@58002000;
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/delete-node/ spi@58003000;
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/delete-node/ sdmmc@58005000;
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/delete-node/ sdmmc@58007000;
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/delete-node/ usbphyc@5a006000;
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/delete-node/ spi@5c001000;
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/delete-node/ stgen@5c008000;
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/delete-node/ i2c@5c009000;
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pin-controller@50002000 {
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/delete-node/ fmc-0;
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/delete-node/ qspi-clk-0;
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/delete-node/ qspi-bk1-0;
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/delete-node/ qspi-bk2-0;
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/delete-node/ sdmmc1-b4-0;
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/delete-node/ sdmmc1-dir-0;
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/delete-node/ sdmmc2-b4-0;
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/delete-node/ sdmmc2-b4-1;
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/delete-node/ sdmmc2-d47-0;
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/delete-node/ usbotg_hs-0;
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/delete-node/ usbotg-fs-dp-dm-0;
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};
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};
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};
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