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backend/rv64: Implement A32SetCpsrNZCV

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This commit is contained in:
Yang Liu
2024-02-17 18:22:24 +08:00
committed by Merry
parent 09c6f22da9
commit 208acb3026
1 changed files with 10 additions and 0 deletions
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10
src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp
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@@ -248,4 +248,14 @@ void EmitIR<IR::Opcode::A32SetCpsrNZC>(biscuit::Assembler& as, EmitContext& ctx,
as.SW(Xscratch0, offsetof(A32JitState, cpsr_nzcv), Xstate);
}
template<>
void EmitIR<IR::Opcode::A32SetCpsrNZCV>(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Xnzcv = ctx.reg_alloc.ReadX(args[0]);
RegAlloc::Realize(Xnzcv);
as.SW(Xnzcv, offsetof(A32JitState, cpsr_nzcv), Xstate);
}
} // namespace Dynarmic::Backend::RV64