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Added 66 0F 38 07 opcode ([ARM64_DYNAREC] too)
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@ -298,7 +298,27 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
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}
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VADDPQ_32(q0, q0, v0);
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break;
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case 0x07:
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INST_NAME("PHSUBSW Gx, Ex");
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nextop = F8;
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GETGX(q0, 1);
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GETEX(q1, 0, 0);
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v0 = fpu_get_scratch(dyn);
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VTRNQ2_16(v0, q0, q0); // v0 have all odd elements (in double)
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NEGQ_16(v0, v0);
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VTRNQ1_16(q0, q0, v0); // re-inject negged element to q0
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SADDLPQ_16(q0, q0); // there is no Add Pair with saturation...
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SQXTN_16(q0, q0);
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if(q0!=q1) {
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VTRNQ2_16(v0, q1, q1);
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NEGQ_16(v0, v0);
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VTRNQ1_16(v0, q1, v0);
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SADDLPQ_16(v0, v0);
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SQXTN2_16(q0, v0);
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} else {
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VMOVeD(q0, 1, q0, 0);
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}
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break;
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case 0x08:
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INST_NAME("PSIGNB Gx, Ex");
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nextop = F8;
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@ -357,7 +357,23 @@ uintptr_t Run660F(x64emu_t *emu, rex_t rex, uintptr_t addr)
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GX->sd[2+i] = EX->sd[i*2+0] - EX->sd[i*2+1];
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}
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break;
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case 0x07: /* PHSUBSW Gx, Ex */
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nextop = F8;
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GETEX(0);
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GETGX;
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for (int i=0; i<4; ++i) {
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tmp32s = GX->sw[i*2+0] - GX->sw[i*2+1];
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GX->sw[i] = (tmp32s<-32768)?-32768:((tmp32s>32767)?32767:tmp32s);
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}
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if(GX == EX) {
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GX->q[1] = GX->q[0];
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} else {
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for (int i=0; i<4; ++i) {
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tmp32s = EX->sw[i*2+0] - EX->sw[i*2+1];
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GX->sw[4+i] = (tmp32s<-32768)?-32768:((tmp32s>32767)?32767:tmp32s);
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}
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}
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break;
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case 0x08: /* PSIGNB Gx, Ex */
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nextop = F8;
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GETEX(0);
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