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2343 Commits

Author SHA1 Message Date
Unknown W. Brackets
46182990cf GPU: Hook US version of Marvel Alliance upload. 
See #9852.  Appears to be the same basic func, but something resulted in a
different hash.  Register use for from/to seems the same.
 2022-11-11 21:51:25 -08:00
Henrik Rydgård
e97d5498c6
Merge pull request #16306 from unknownbrackets/ir-prefixes 
irjit: Correct prefix validation
 2022-10-31 09:11:52 +01:00
Unknown W. Brackets
eef29d5e95 irjit: Correct prefix validation. 
Some vcmps, etc. were perfectly valid but were forcing to interp.
This also catches more cases that should go to interp correctly.
 2022-10-30 23:15:54 -07:00
Unknown W. Brackets
2da1bf7ffc interp: Correct dprefix accuracy for vrot. 
Ignores cosine lane, not always x.
 2022-10-30 21:47:28 -07:00
Unknown W. Brackets
56ff555309 irjit: Fix unordered float compares. 2022-10-30 21:12:59 -07:00
Henrik Rydgård
ba32ef5ea5
Merge pull request #16302 from unknownbrackets/vrot-overlap 
Handle vrot overlap and vscl/vmscl prefixes more accurately
 2022-10-30 07:24:23 +01:00
Unknown W. Brackets
bbdc8a8f98 interp: Correct vscl/vmscl t prefix handling. 
This makes more sense.  Fixes Dissidia 012 issues.
 2022-10-29 22:43:30 -07:00
Unknown W. Brackets
3f997518f3 irjit: Handle vrot overlap more correctly. 
Sine ignores overlap, cosine does not.
 2022-10-29 22:25:25 -07:00
Unknown W. Brackets
17d94cd358 SaveState: Restore replacements in only one place. 2022-10-29 17:59:35 -07:00
Unknown W. Brackets
0a98ac43fa Debugger: Allow currently-invalid memory reference. 2022-10-29 17:43:35 -07:00
Unknown W. Brackets
b9de1a44df jit: Reduce some include pollution. 
Usually no need for all of MIPSAnalyst.
 2022-10-27 23:26:44 -07:00
Unknown W. Brackets
813bfded92
x86jit: Correct vh2f NAN handling (#16275) 
* x86jit: Correct vh2f NAN handling.

Allows another test to pass.

* x86jit: Reuse MAccessibleDisp().
 2022-10-23 10:09:29 +02:00
Henrik Rydgård
0719f1d4ea Merge branch 'cheat-icache' (PR #16234) 2022-10-16 09:55:30 +02:00
Unknown W. Brackets
0226d95000 jit: Run invalidates immediately. 
Previously, I thought we might clear native code when invalidating - we
don't.  We only do that when clearing.
 2022-10-15 18:52:46 -07:00
Unknown W. Brackets
fa5f9d5e74 jit: Consistently check range on invalidate. 
We did this on x86, we should do it everywhere or nowhere.
 2022-10-15 18:30:13 -07:00
Unknown W. Brackets
c4bf2cb5c0 jit: Ignore zero byte icache invalidates. 
These were getting marked pending and were clearing all cache, causing
performance concerns in for example LittleBigPlanet.
 2022-10-15 18:27:52 -07:00
Henrik Rydgård
26f6afbfa7 Followup to #16205, fix one more instance of the problem. 2022-10-12 01:02:54 +02:00
Henrik Rydgård
df5b51990d ArmJit: Save/restore downcount where needed, we missed a few cases. 2022-10-11 15:50:37 +02:00
Henrik Rydgård
a34e32abe1 Revert "Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194" 
This reverts commit bc28f54612.
 2022-10-11 15:42:59 +02:00
Henrik Rydgård
bc28f54612 Disables "ForceCheck" on jit invalidation on ARM32, introduced in #16194 
I'm not sure if we should call it at all here, but at least this makes
games work again on ARM32. Will need more investigation.
 2022-10-11 10:10:52 +02:00
Unknown W. Brackets
728748b108 MIPS: Fix non standard layout offsets. 2022-10-10 17:30:15 -07:00
Unknown W. Brackets
825450a373 jit: Defer invalidations made while running. 
Previously, invalidating icache could happen while running, which might
cause the CPU to return into outer space.  This runs such invalidations
after letting the CPU exit.

It was easy to trigger this with the debugger: step using the GE debugger,
add a CPU memory breakpoint, then resume from the GE debugger.
However, cheats and the like could cause similar issues.
 2022-10-09 21:26:13 -07:00
Unknown W. Brackets
057661380e GPU: Hook Gods Eater Burst avatar read. 
Currently not working since depth comes back as 0.
 2022-10-09 00:52:35 -07:00
Herman Semenov
29b87e0c0b
Merge branch 'master' into master 2022-10-03 07:49:13 +00:00
Unknown W. Brackets
ac335ad61a armips: Update to UTF-8/c++17 armips. 2022-09-30 19:48:14 -07:00
Unknown W. Brackets
c49b91c62b armips: Update to latest. 2022-09-30 17:47:43 -07:00
lainon
3cdf72b68b Better readability and optimization insertion into container by replacing 'insert' -> 'emplace', 'push_back' -> 'emplace_back' 2022-09-30 12:35:28 +03:00
lainon
b304551747 Code readability, vec reserve() and remove excess c_str() 2022-09-30 12:31:32 +03:00
lainon
fec708489a Correct cleaning string and remove unused vars 2022-09-30 12:26:30 +03:00
Unknown W. Brackets
f75dadd1d6 arm64jit: Handle branch/jump in branch delay slots. 2022-09-03 21:04:54 -07:00
Unknown W. Brackets
bac36df453 x86jit: Refactor and fix jump in branch delay slot. 
This seems cleaner, instead of the duplication of lines for each branch
type.
 2022-09-03 19:58:46 -07:00
Unknown W. Brackets
d08ee44cf4 irjit: Handle branch/jump in branch delay slots. 
See #15952 for more detail.
 2022-09-03 19:05:31 -07:00
Unknown W. Brackets
0fc3619d1d interp: Handle jumps in branch delay slots better. 
This matches tests from a PSP-2000.  Seems to consistently run the
instruction even if likely, which writes rd.

If the likely branch is not taken, the jump in the delay slot is taken.
However, it should cancel the rd write (not implemented here.)
 2022-09-03 13:15:21 -07:00
Unknown W. Brackets
8e7847f6d9 UI: Show return address for exec crashes. 2022-08-21 14:49:34 -07:00
Unknown W. Brackets
80e481bbdc Core: Show exception on misaligned jump. 2022-08-21 14:49:34 -07:00
Unknown W. Brackets
90517ace59 irjit: Validate alignment in slow memory mode. 2022-08-21 13:24:10 -07:00
Unknown W. Brackets
6715f41410 irjit: Add constructs for validing mem access. 
Basically to allow slow/fast memory to work with IR, including for
alignment checks.
 2022-08-21 13:01:23 -07:00
Unknown W. Brackets
7b081a61c8 irjit: Correct another PurgeTemps case. 
In this case:
  Mov A, B
  AndConst A, A, 1
  Load32 C, A, 0

Was still swapping the Load32 to B, not just the AndConst.

Fixes #15735.
 2022-07-27 19:38:16 -07:00
Unknown W. Brackets
5abf1362a2 irjit: Clarify PurgeTemps, guard a couple ops. 
Although I think we skip simplify passes on breakpoints entirely, safer to
exclude these ops.
 2022-07-27 19:36:53 -07:00
Unknown W. Brackets
2154f747fc irjit: Simplify more arithmetic to Movs. 
Later passes rely on things being Mov, so better to have them more often.
 2022-07-24 11:35:54 -07:00
Unknown W. Brackets
8f23025209 irjit: Add tests for IR passes. 2022-07-24 11:35:54 -07:00
Henrik Rydgård
e6403d7157 Split GetPointer into two versions, to help with const correctness 2022-07-24 13:26:19 +02:00
Unknown W. Brackets
c2a1caa2a2 irjit: Prevent corruption on purge temps pass. 
If a switch occurs and then something clobbers the dest of that switch, we
were wiping out the first of those three instructions incorrectly.
 2022-07-21 09:06:37 -07:00
LunaMoo
4b959c6b54 Add Zettai Zetsumei Toshi 3 bypass for softlock on character select screen 2022-07-14 23:17:32 +02:00
Unknown W. Brackets
25e18195ce irjit: Allow unaligned loads by default. 
This was the original intention, was a mistake that this was flipped.
 2022-07-11 17:36:39 -07:00
Henrik Rydgård
d2002eab39
Merge pull request #15640 from LunaMoo/master 
Disable ForceMax60FPS for GOW games and replace it with fixed 60 fps
 2022-07-10 23:25:35 +02:00
Unknown W. Brackets
74efce2d00 interp: Fix constant typo. 2022-07-04 17:31:12 -07:00
LunaMoo
5a06776999 Change hack names and edit comments based on feedback. 2022-07-04 00:58:48 +02:00
LunaMoo
1da9cd933b Test hack that breaks the vortex timer, it's still wrong 2022-07-03 04:23:26 +02:00
LunaMoo
0dcf8242f5 Add Fixed60FPShack for GOW, should work smoother than the ForceMax60FPS. 
Also more stable than it's CWCheat version, unfortunately because of that,
still causes softlock in GOW:GOS vortex stage.
 2022-07-02 19:39:35 +02:00
Henrik Rydgård
cd92151de7 Add ARM64_NEON compile arch flag 
This allows doing ARM64 builds without NEON support, and allows simplifying some checks.
 2022-06-25 07:29:20 +02:00
Unknown W. Brackets
925a6d0ae1 GPU: Hook Sol Trigger func to flush texture. 
This makes sure the hardware renderer reuploads a texture modified during
stall, which they normally skip as an optimization (see #10967, #9449.)
 2022-05-22 11:44:49 -07:00
Henrik Rydgård
1bbaba4103 Fix some NEON code that had bad compile-time checks (and some didn't compile) 2022-04-15 00:54:44 +02:00
Henrik Rydgård
584e94f01e ARM32: Remove a lot of non-NEON fallback paths 2022-04-13 11:44:55 +02:00
Unknown W. Brackets
16dca4f69b x86jit: Use BMI2 for variable shifts. 
We don't actually regalloc ECX, but this still saves a copy, and on modern
CPUs these seem to be pretty fast.
 2022-01-31 19:38:17 -08:00
Unknown W. Brackets
2479d52202 Global: Reduce includes of common headers. 
In many places, string, map, or Common.h were included but not needed.
 2022-01-30 16:35:33 -08:00
Unknown W. Brackets
3df6cb704f Global: Fix some type conversion warnings. 
Hidden by some warning disables.
 2022-01-30 16:09:33 -08:00
Unknown W. Brackets
48b597a1b9 Display: Move core counters/stats to HW file. 
This separates things better, so not everything is pulling in HLE.
 2022-01-30 11:53:48 -08:00
Unknown W. Brackets
8573c34f85 x86jit: Check CALL dist for safe memory funcs. 2022-01-22 00:14:15 -08:00
Henrik Rydgård
2c38a14ad6
Merge pull request #15243 from unknownbrackets/icache-hash 
jit: Use a hash for invalidate/clear all
 2021-12-19 20:59:56 +01:00
Unknown W. Brackets
00f9707399 jit: Use a hash for invalidate/clear all. 
This should make sceKernelICacheClearAll() more useful.
 2021-12-19 10:40:33 -08:00
Unknown W. Brackets
db2eddcf27 Debugger: Remove double debug window updates. 
Core_EnableStepping() is already marking the debug windows for update,
there's no need to call SetDebugMode() again.
 2021-12-12 11:24:03 -08:00
Henrik Rydgård
3ece12bb64
Merge pull request #15228 from unknownbrackets/vrndf 
Correct vrndf2 range
 2021-12-12 08:46:35 +01:00
Unknown W. Brackets
63e623ecb2 Build: Fix some format truncation warnings. 
Generally all should be safe already, but better to be sure.
 2021-12-11 10:45:27 -08:00
Unknown W. Brackets
de2481f367 interp: Correct vrndf2 range. 
This seems more likely to be how the hardware works, given the range of
values.
 2021-12-11 10:18:12 -08:00
Unknown W. Brackets
b8ab7f39df jit: Lock around changes to the jit pointer. 2021-11-28 10:04:22 -08:00
Unknown W. Brackets
0c6c2fb47a jit: More atomically update pointer. 2021-11-27 06:00:18 -08:00
Henrik Rydgård
fdacf751ce NEON/SSE-optimize some matrix multiplications used by software transform 
Will hopefully reclaim any potential speed loss from the recent
refactor.
 2021-10-31 13:36:34 +01:00
Unknown W. Brackets
2bd13c5d9d Debugger: Track reason for entering stepping. 2021-10-23 16:56:15 -07:00
kotcrab
450d0ef015 Remove .s suffix from vwbn disassembly 2021-09-27 22:42:10 +02:00
kotcrab
7a124d84ae Fix disassembly of vcst 2021-09-25 19:34:41 +02:00
kotcrab
4bdba8ae6f Fix disassembly of vmfvc and vmtvc 2021-09-25 16:33:07 +02:00
Unknown W. Brackets
529329785b interp: Prevent crash on bad lv.q or sv.q addr. 
See #5496.
 2021-09-02 07:18:49 -07:00
Unknown W. Brackets
52e9856b4b Debugger: Fix breakpoints on delay slots. 2021-08-23 23:00:30 -07:00
Henrik Rydgård
a74e1a422d GameScreen: Minor logic cleanup, remove Calculate CRC button when not needed. 2021-08-21 20:58:25 +02:00
Henrik Rydgård
025bcb1673 Introduce Path, start using it all over the place. 
Still lots left to convert!

Convert GetSysDirectory to return Path.

More buildfixing

Remove unnecessary Path( constructors
 2021-05-13 10:39:16 +02:00
Unknown W. Brackets
e0afdfe9be Core: Leave delay slot when re-entering jit. 
If stepping, we may get into a delay slot within interpreted code, and
then try to run (i.e. Step Out), which won't clear the delay slot
properly.

This can cause weird behavior when interp is used again later, in addition
to immediate wrong branching behavior.
 2021-05-09 08:52:38 -07:00
Unknown W. Brackets
a84df2536a Core: Fix vrot cos(2) typo. 2021-04-25 19:26:16 -07:00
Unknown W. Brackets
07cb37c2c1 Compat: Remove single/double sincos path. 
New implementation should work for both cases.
 2021-04-25 07:09:50 -07:00
Unknown W. Brackets
ad876f06f3 Core: Special case 1/-1 for cosine. 
It still gets these off from zero, so let's just special case.
 2021-04-24 16:29:20 -07:00
Unknown W. Brackets
8f41c78ed7 Core: Strip off lower bits of sin/cos results. 2021-04-24 16:29:20 -07:00
Unknown W. Brackets
ad9ad0f70b Core: Apply custom narrowing before VFPU sin/cos. 
This makes the results much more accurate to the PSP's results.
Could narrow a bit further swapping sin/cos/neg, which might be what the
hardware does given vrot.
 2021-04-24 16:29:20 -07:00
Unknown W. Brackets
e9076c90bb Core: Cleanup VFPU float bit handling. 
Just to use a common union.
 2021-04-24 15:49:22 -07:00
Unknown W. Brackets
86585e9551 unittest: Fix jit harness init. 2021-04-24 15:48:17 -07:00
Unknown W. Brackets
c4eafcf008 jit: Increase the cycle cost of div.s. 
This largely matches tests on a real PSP.
 2021-04-12 07:06:18 -07:00
Unknown W. Brackets
53104639ff jit: Increase the cycle cost of VFPU ops. 
It seems like they all take at least 2 cycles, which kinda makes sense.
 2021-04-12 07:06:18 -07:00
Unknown W. Brackets
bc16a55028 jit: Count delay slot cycles separately. 
This makes it easier to count cycles per instruction, instead of ignoring
the delay slot's instruction for cycle count.
 2021-04-12 07:04:22 -07:00
Henrik Rydgård
e86e3cc7cd
Merge pull request #14344 from unknownbrackets/debugger-mem 
Include more memory info in debugger tags
 2021-04-04 11:20:33 +02:00
Unknown W. Brackets
f5de7c23fe Debugger: Note writes from debugger. 
To avoid confusion.
 2021-04-03 18:14:59 -07:00
Unknown W. Brackets
1d413c2470 Core: Limit scan for functions to end of valid RAM. 
Otherwise we can scan ahead and cause a memory exception.
 2021-03-28 19:43:26 -07:00
Unknown W. Brackets
4178f09e57 Build: More consistently avoid _M_ defines. 
We use PPSSPP_ARCH in several places already, this makes it more complete.
 2021-03-02 21:49:21 -08:00
Unknown W. Brackets
d9aecffd72 Build: Remove old ARM define. 2021-03-02 21:26:03 -08:00
Unknown W. Brackets
5119d79082 Build: Remove IOS define. 2021-03-02 21:04:03 -08:00
Unknown W. Brackets
13ec384dbe Build: Explicitly include ppsspp_config.h. 
This adds it to all files that use it.  Not all our builds include the
file.
 2021-03-02 21:04:03 -08:00
Unknown W. Brackets
7de77e4683 mipsjit: Correct inheritance/compilation. 2021-02-26 07:24:58 -08:00
Unknown W. Brackets
cae0815095 jit: Avoid using mips identifier directly. 
Apparently this gets defined on mips systems.
 2021-02-26 07:24:58 -08:00
sum2012
00d2a050b8 Hook open season 
Fix #13252
original from #13326
 2021-02-21 13:46:49 +08:00
Unknown W. Brackets
f32f89dd90 Global: Remove some unused variables. 2021-02-15 11:59:45 -08:00
Henrik Rydgård
0a1303b069
Merge pull request #13938 from unknownbrackets/worms-hook 
HLE: Hook Worms text render copy func
 2021-02-15 16:32:00 +01:00
Henrik Rydgård
6df37b86bc
Merge pull request #14076 from unknownbrackets/zhp-map 
GPU: Force texture invalidation for ZHP minimap
 2021-02-15 11:33:32 +01:00