| .. |
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IRAsm.cpp
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Initial commit for IRJit
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2016-05-07 13:58:29 +02:00 |
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IRCompALU.cpp
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irjit: Cleanup some invalid op handling.
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2018-01-01 08:38:11 -08:00 |
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IRCompBranch.cpp
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irjit: Properly account for delay slots in size.
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2018-01-01 22:54:40 -08:00 |
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IRCompFPU.cpp
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irjit: Cleanup some invalid op handling.
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2018-01-01 08:38:11 -08:00 |
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IRCompLoadStore.cpp
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irjit: Fix swr typo.
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2018-01-03 08:14:25 -08:00 |
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IRCompVFPU.cpp
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irjit: Cleanup some invalid op handling.
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2018-01-01 08:38:11 -08:00 |
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IRFrontend.cpp
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irjit: Properly account for delay slots in size.
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2018-01-01 22:54:40 -08:00 |
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IRFrontend.h
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irjit: Add options for compile/optimize steps.
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2018-01-01 08:38:12 -08:00 |
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IRInst.cpp
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irjit: Add extra temps to make lwl/swl/etc. easier.
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2018-01-01 08:38:11 -08:00 |
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IRInst.h
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IR Interpreter: Add a comment, minor cleanup, minor SSE stuff.
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2018-01-03 16:31:55 +01:00 |
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IRInterpreter.cpp
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IR Interpreter: Add a comment, minor cleanup, minor SSE stuff.
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2018-01-03 16:31:55 +01:00 |
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IRInterpreter.h
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jit-ir: Implement bit reverse instruction.
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2016-05-14 18:21:42 -07:00 |
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IRJit.cpp
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irjit: Add options for compile/optimize steps.
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2018-01-01 08:38:12 -08:00 |
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IRJit.h
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irjit: Speed up icache block invalidation.
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2017-12-31 10:37:09 -08:00 |
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IRPassSimplify.cpp
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irjit: Add options for compile/optimize steps.
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2018-01-01 08:38:12 -08:00 |
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IRPassSimplify.h
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irjit: Add options for compile/optimize steps.
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2018-01-01 08:38:12 -08:00 |
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IRRegCache.cpp
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jit-ir: Less instructions cause flushing in constant propagation.
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2016-05-08 23:25:08 +02:00 |
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IRRegCache.h
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jit-ir: Less instructions cause flushing in constant propagation.
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2016-05-08 23:25:08 +02:00 |
