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RegisterAllocationPass: drop AVX flag

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RA should not depend on whether we support AVX, that's a huge layering
violation! and fortunately, it does not.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig 2024-05-08 14:25:17 -04:00
parent 4d503d3155
commit 9d86e11a47
5 changed files with 10 additions and 12 deletions
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2
FEXCore/Source/Interface/Core/Core.cpp
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@ -374,7 +374,7 @@ void ContextImpl::InitializeCompiler(FEXCore::Core::InternalThreadState* Thread)
// Create CPU backend
switch (Config.Core) {
case FEXCore::Config::CONFIG_IRJIT:
Thread->PassManager->InsertRegisterAllocationPass(HostFeatures.SupportsAVX);
Thread->PassManager->InsertRegisterAllocationPass();
Thread->CPUBackend = FEXCore::CPU::CreateArm64JITCore(this, Thread);
break;
case FEXCore::Config::CONFIG_CUSTOM: Thread->CPUBackend = CustomCPUFactory(this, Thread); break;

4
FEXCore/Source/Interface/IR/PassManager.cpp
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@ -101,8 +101,8 @@ void PassManager::AddDefaultValidationPasses() {
#endif
}
void PassManager::InsertRegisterAllocationPass(bool SupportsAVX) {
InsertPass(IR::CreateRegisterAllocationPass(GetPass("Compaction"), SupportsAVX), "RA");
void PassManager::InsertRegisterAllocationPass() {
InsertPass(IR::CreateRegisterAllocationPass(GetPass("Compaction")), "RA");
}
bool PassManager::Run(IREmitter* IREmit) {

2
FEXCore/Source/Interface/IR/PassManager.h
View File

@ -56,7 +56,7 @@ public:
return PassPtr;
}
void InsertRegisterAllocationPass(bool SupportsAVX);
void InsertRegisterAllocationPass();
bool Run(IREmitter* IREmit);

2
FEXCore/Source/Interface/IR/Passes.h
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@ -23,7 +23,7 @@ fextl::unique_ptr<FEXCore::IR::Pass> CreateDeadFlagCalculationEliminination();
fextl::unique_ptr<FEXCore::IR::Pass> CreateDeadStoreElimination();
fextl::unique_ptr<FEXCore::IR::Pass> CreatePassDeadCodeElimination();
fextl::unique_ptr<FEXCore::IR::Pass> CreateIRCompaction(FEXCore::Utils::IntrusivePooledAllocator& Allocator);
fextl::unique_ptr<FEXCore::IR::RegisterAllocationPass> CreateRegisterAllocationPass(FEXCore::IR::Pass* CompactionPass, bool SupportsAVX);
fextl::unique_ptr<FEXCore::IR::RegisterAllocationPass> CreateRegisterAllocationPass(FEXCore::IR::Pass* CompactionPass);
fextl::unique_ptr<FEXCore::IR::Pass> CreateLongDivideEliminationPass();
namespace Validation {

12
FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp
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@ -226,7 +226,7 @@ namespace {
class ConstrainedRAPass final : public RegisterAllocationPass {
public:
ConstrainedRAPass(FEXCore::IR::Pass* _CompactionPass, bool SupportsAVX);
ConstrainedRAPass(FEXCore::IR::Pass* _CompactionPass);
~ConstrainedRAPass();
bool Run(IREmitter* IREmit) override;
@ -250,7 +250,6 @@ private:
RegisterGraph* Graph;
FEXCore::IR::Pass* CompactionPass;
bool SupportsAVX;
fextl::vector<LiveRange> LiveRanges;
@ -297,9 +296,8 @@ private:
fextl::vector<LiveRange*> StaticMaps;
};
ConstrainedRAPass::ConstrainedRAPass(FEXCore::IR::Pass* _CompactionPass, bool _SupportsAVX)
: CompactionPass {_CompactionPass}
, SupportsAVX {_SupportsAVX} {}
ConstrainedRAPass::ConstrainedRAPass(FEXCore::IR::Pass* _CompactionPass)
: CompactionPass {_CompactionPass} {}
ConstrainedRAPass::~ConstrainedRAPass() {
FreeRegisterGraph(Graph);
@ -1239,7 +1237,7 @@ bool ConstrainedRAPass::Run(IREmitter* IREmit) {
return Changed;
}
fextl::unique_ptr<FEXCore::IR::RegisterAllocationPass> CreateRegisterAllocationPass(FEXCore::IR::Pass* CompactionPass, bool SupportsAVX) {
return fextl::make_unique<ConstrainedRAPass>(CompactionPass, SupportsAVX);
fextl::unique_ptr<FEXCore::IR::RegisterAllocationPass> CreateRegisterAllocationPass(FEXCore::IR::Pass* CompactionPass) {
return fextl::make_unique<ConstrainedRAPass>(CompactionPass);
}
} // namespace FEXCore::IR