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JITArm64: Fixes bug in rpres scalar operations

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Noticed this during code investigation, these two operations were
swapped.

Would have caused issues if anything supported RPRES today.
This commit is contained in:
Ryan Houdek 2023-10-21 15:24:43 -07:00
parent 2e694412f4
commit d5beba9423
1 changed files with 2 additions and 2 deletions
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4
FEXCore/Source/Interface/Core/JIT/Arm64/VectorOps.cpp
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@ -384,7 +384,7 @@ DEF_OP(VFRSqrtScalarInsert) {
auto ScalarEmitRPRES = [this, SubRegSize](ARMEmitter::VRegister Dst, std::variant<ARMEmitter::VRegister, ARMEmitter::Register> SrcVar) {
auto Src = *std::get_if<ARMEmitter::VRegister>(&SrcVar);
frecpe(SubRegSize.Scalar, Dst.S(), Src.S());
frsqrte(SubRegSize.Scalar, Dst.S(), Src.S());
};
std::array<ScalarUnaryOpCaller, 2> Handlers = {
@ -421,7 +421,7 @@ DEF_OP(VFRecpScalarInsert) {
auto ScalarEmitRPRES = [this, SubRegSize](ARMEmitter::VRegister Dst, std::variant<ARMEmitter::VRegister, ARMEmitter::Register> SrcVar) {
auto Src = *std::get_if<ARMEmitter::VRegister>(&SrcVar);
frsqrte(SubRegSize.Scalar, Dst, Src);
frecpe(SubRegSize.Scalar, Dst, Src);
};
std::array<ScalarUnaryOpCaller, 2> Handlers = {