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InstructionCountCI: add bytemark huffman blocks
this test case has our biggest delta to native by far. the trash code we emit makes clear why! Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
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@ -283,6 +283,165 @@
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"subs w26, w4, #0x18 (24)"
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]
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},
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"bytemark huffman 1": {
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"ExpectedInstructionCount": 25,
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"x86Insts": [
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"mov r9,rdx",
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"mov r8,rcx",
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"nop dword [rax+0x0]",
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"mov r10d,esi",
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"shr r10d,0x3",
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"movzx r10d,byte [rbp+r10*1+0x0]",
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"mov r11d,esi",
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"and r11d,0x7",
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"bt r10d,r11d",
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"lea r8,[r8+r8*4]",
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"lea r8,[rbx+r8*4+0x10]",
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"cmovae r8,r9",
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"movsxd r8,dword [r8]",
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"add rsi,0x1",
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"lea r10,[r8+r8*4]",
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"lea r9,[rbx+r10*4]",
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"add r9,0xc",
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"cmp dword [rbx+r10*4+0xc],0xffffffff"
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],
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"ExpectedArm64ASM": [
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"mov x13, x6",
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"mov x12, x5",
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"mov w14, w10",
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"lsr w14, w14, #3",
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"ldrb w14, [x9, x14, sxtx]",
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"mov w15, w10",
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"and w15, w15, #0x7",
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"lsr w20, w14, w15",
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"eor x20, x20, #0x1",
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"rmif x20, #63, #nzCv",
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"add x12, x12, x12, lsl #2",
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"add x20, x7, #0x10 (16)",
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"add x12, x20, x12, lsl #2",
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"csel x12, x13, x12, hs",
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"ldr w20, [x12]",
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"sxtw x12, w20",
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"add x10, x10, #0x1 (1)",
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"add x14, x12, x12, lsl #2",
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"add x13, x7, x14, lsl #2",
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"add x13, x13, #0xc (12)",
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"mov w20, #0xffffffff",
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"add x21, x7, x14, lsl #2",
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"ldr w21, [x21, #12]",
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"mvn w27, w21",
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"subs w26, w21, w20"
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]
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},
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"bytemark huffman 2": {
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"ExpectedInstructionCount": 19,
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"x86Insts": [
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"movsxd r9,r8d",
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"lea r9,[r9+r9*4]",
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"cmp dword [rbx+r9*4+0xc],ecx",
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"sete cl",
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"xor cl,0x31",
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"mov byte [rsp+rdi*1+0x50],cl",
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"add rdi,0x1",
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"mov ecx,r8d",
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"mov r8d,dword [rbx+r9*4+0x8]",
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"cmp r8d,0xfffffffe"
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],
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"ExpectedArm64ASM": [
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"sxtw x13, w12",
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"add x13, x13, x13, lsl #2",
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"add x20, x7, x13, lsl #2",
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"ldr w20, [x20, #12]",
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"subs w20, w20, w5",
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"cset x21, eq",
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"bfxil x5, x21, #0, #8",
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"mov w21, #0x31",
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"eor w21, w5, w21",
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"bfxil x5, x21, #0, #8",
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"add x21, x8, x11",
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"strb w5, [x21, #80]",
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"add x11, x11, #0x1 (1)",
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"mov w5, w12",
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"add x21, x7, x13, lsl #2",
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"ldr w12, [x21, #8]",
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"mov w21, #0xfffffffe",
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"mvn w27, w12",
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"subs w26, w12, w21"
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]
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},
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"bytemark huffman 3": {
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"ExpectedInstructionCount": 47,
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"x86Insts": [
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"mov ecx,eax",
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"and cl,0x7",
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"mov r8b,0x1",
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"shl r8b,cl",
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"mov r9d,eax",
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"shr r9d,0x3",
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"movzx r10d,byte [rbp+r9*1+0x0]",
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"mov r11b,0xfe",
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"mov ecx,eax",
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"rol r11b,cl",
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"and r11b,r10b",
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"or r8b,r10b",
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"cmp byte [rsp+rdi*1+0x4f],0x31",
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"movzx ecx,r8b",
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"movzx r8d,r11b",
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"cmove r8d,ecx",
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"add rax,0x1",
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"mov byte [rbp+r9*1+0x0],r8b",
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"add rdi,0xffffffffffffffff"
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],
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"ExpectedArm64ASM": [
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"mov w5, w4",
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"and w20, w5, #0x7",
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"bfxil x5, x20, #0, #8",
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"mov w20, #0x1",
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"bfxil x12, x20, #0, #8",
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"lsl w20, w12, w5",
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"bfxil x12, x20, #0, #8",
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"mov w13, w4",
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"lsr w26, w13, #3",
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"cmp w26, #0x0 (0)",
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"eor x20, x13, #0x4",
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"rmif x20, #1, #nzCv",
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"mov x13, x26",
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"ldrb w14, [x9, x13, sxtx]",
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"mov w20, #0xfe",
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"bfxil x15, x20, #0, #8",
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"mov w5, w4",
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"and x20, x5, #0x1f",
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"cbz x20, #+0x2c",
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"mov w20, w15",
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"bfi w20, w15, #8, #8",
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"bfi w20, w20, #16, #16",
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"neg w21, w5",
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"ror w20, w20, w21",
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"bfxil x15, x20, #0, #8",
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"eor x21, x20, #0x1",
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"rmif x21, #63, #nzCv",
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"eor w20, w20, w20, lsr #7",
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"rmif x20, #0, #nzcV",
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"and w20, w15, w14",
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"bfxil x15, x20, #0, #8",
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"orr w20, w12, w14",
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"bfxil x12, x20, #0, #8",
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"mov w20, #0x31",
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"add x21, x8, x11",
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"ldrb w21, [x21, #79]",
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"lsl w0, w21, #24",
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"cmp w0, w20, lsl #24",
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"uxtb w5, w12",
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"uxtb w12, w15",
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"csel w12, w5, w12, eq",
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"add x4, x4, #0x1 (1)",
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"strb w12, [x9, x13, sxtx]",
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"mvn w27, w11",
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"subs x26, x11, #0x1 (1)",
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"cfinv",
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"mov x11, x26"
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]
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},
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"pcmpistri xmm0, xmm1, 0_0_00_11_01b": {
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"ExpectedInstructionCount": 41,
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"Comment": [
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