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IR: Change VStoreNonTemporalPair to use IR::OpSize

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Ryan Houdek 2024-10-27 17:44:57 -07:00
parent 321f686108
commit f4744f1e79
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1 changed files with 1 additions and 1 deletions
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FEXCore/Source/Interface/IR/IR.json
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@ -740,7 +740,7 @@
"RegisterSize == FEXCore::IR::OpSize::i128Bit || RegisterSize == FEXCore::IR::OpSize::i256Bit"
]
},
"VStoreNonTemporalPair u8:#RegisterSize, FPR:$ValueLow, FPR:$ValueHigh, GPR:$Addr, i8:$Offset": {
"VStoreNonTemporalPair OpSize:#RegisterSize, FPR:$ValueLow, FPR:$ValueHigh, GPR:$Addr, i8:$Offset": {
"Desc": ["Does a non-temporal memory store of two vector registers.",
"Matches arm64 stnp semantics.",
"Specifically weak-memory model ordered to match x86 non-temporal stores."