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Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis
1f919949cc JIT: Fix arm64 build 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
63507f5ece IR: Fix int64_t parsing 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
dbc8b8e8e9 AOTIR: Append optimization flags to fileid 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
681deca4eb IR: Make entrypoint implicit, Add InlineEntrypointOffset, make ValidateCode Entrypoint-relative 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
b3d12fbb7b AOTIR: Cleanup interface 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
fafc987eab AOTIR: Rename Generate to Capture 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
d825ed2b03 AOTIR: Reduce map lookup 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
f2f62c5f2c AOTIR: Implement EntrypointOffset for aarch64 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
3e1e093b24 AOTIR: Store in ~/.fex-emu/aotir, per so 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
71dceb5339 Fix relocation support for FinishOp 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
be40d1604a Improve aotir format 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
47d4481a75 AOTIR: Support relocations via new ir op 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
fc30efe040 AOTIR: Add hashing of code bytes 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
57680a8614 AOTIR: Add --aotir-generate and --aotir-load to FEXLoader & Config 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
66bdface49 AOTIR: Make copies for insertions, only cache RA'd blocks 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
816c4656df IR: Add AOT Cache 2021-02-23 12:08:57 +02:00
Scott Mansell
7b97c3fa23
Merge pull request #755 from Sonicadvance1/host_uname 
Pulls uname nodename from host system
 2021-02-23 23:07:29 +13:00
Stefanos Kornilios Mitsis Poiitidis
8642406b8f CPUID: Add cache information, function 0x2 2021-02-23 11:01:15 +02:00
Stefanos Kornilios Mitsis Poiitidis
e2599db3ed
Merge pull request #793 from Sonicadvance1/assert_on_missing_lock 
Adds assert checks on missing LOCK support
 2021-02-23 10:51:30 +02:00
Ryan Houdek
bb0850eab8 Adds assert checks on missing LOCK support 
These usually don't get hit, but Geekbench4 DOES manage to hit LOCK on
BTS.

Which we just don't support right now.
 2021-02-22 23:20:18 -08:00
Stefanos Kornilios Mitsis Poiitidis
1af541475a
Merge pull request #795 from Sonicadvance1/atomic_bittest_ops 
Implements BTC, BTR, BTS atomic variants
 2021-02-23 09:08:39 +02:00
Stefanos Kornilios Mitsis Poiitidis
6669bd2d4a
Merge pull request #794 from Sonicadvance1/fix_log_move_fail 
Pass log moves on buildbot stage failure
 2021-02-23 08:59:21 +02:00
Ryan Houdek
d3e98fedb4 Pulls uname nodename from host system 
Hardcoding FEXCore as the nodename is an annoyance.
Pull the host's nodename instead.

Fixes #600
 2021-02-22 22:39:05 -08:00
Ryan Houdek
8a39f4b25c Implements BTC, BTR, BTS atomic unit tests 
This just takes the regular non-atomic unit tests and changes them to
have lock prefixes.
These are all handled as byte sized atomics so there aren't any
alignment problems.
 2021-02-22 22:29:31 -08:00
Ryan Houdek
232eeff483 Implements BTC, BTR, BTS atomic variants 
BTS specifically is being used for threading related tasks. Which could
be why our threading has been unstable.
 2021-02-22 22:27:10 -08:00
Ryan Houdek
12ef69650f Pass log moves on buildbot stage failure 
Passes the log movement stage to clean up the output.
Really it is only the first unit test stage that is failing, but each
subsequent log run will have failed to move since the previous stage
didn't run.

Makes it easier to scan over a failure as only the first unit test
failure step.
 2021-02-22 18:42:28 -08:00
Ryan Houdek
f1349becb4 Disables the unaligned atomic memory op tests 
These don't run on the armv8.0 runner
 2021-02-22 18:33:17 -08:00
Ryan Houdek
f848957e17 Implements unit tests for the new unaligned atomics 
Tests all the unaligned atomic ops we support now
 2021-02-22 18:25:25 -08:00
Ryan Houdek
55fc47e0b7 Passes SIGBUS handler to unaligned atomic op handler for ARMv8.1 
ARMv8.0 still unsupported here.

This allows us to support unaligned atomic ops for every atomic x86 op
that we support.
 2021-02-22 18:22:10 -08:00
Ryan Houdek
4f40166902 Implements unaligned atomic memory ops for ARMv8.1+ 
This takes the existing unaligned CAS handling code and makes it more
robust to handle both true unaligned CAS and unaligned atomic memory
ops.

Specifically it inserts some lambda helpers to calculate the Desired and
Expected values inside of the CAS loops to account for CAS and memory
operation.
 2021-02-22 18:17:53 -08:00
Stefanos Kornilios Mitsis Poiitidis
fba626c547
Merge pull request #790 from FEX-Emu/skmp/workaround-exit-group 
Threading: Workaround exit_group bug
 2021-02-22 17:50:59 +02:00
Stefanos Kornilios Mitsis Poiitidis
9b360e66dc Threading: Workaround exit_group bug 2021-02-22 14:24:42 +02:00
Stefanos Kornilios Mitsis Poiitidis
3a6fd00154
Merge pull request #785 from FEX-Emu/skmp/fix-sar8-16 
OpDisp: Imm SAR OpSize < 32 needs sign extension
 2021-02-18 22:33:46 +02:00
Stefanos Kornilios Mitsis Poiitidis
3bc12de017 OpDisp: Imm SAR OpSize < 32 needs sign extension 2021-02-17 08:17:20 +02:00
Stefanos Kornilios Mitsis Poiitidis
5ae6a64800
Merge pull request #778 from FEX-Emu/skmp/x87-round-trunc 
x87: Round, Truncate & Precision control
 2021-02-17 05:27:56 +02:00
Stefanos Kornilios Mitsis Poiitidis
6615d5972f x87: Support for FCW, rounding, truncation, precision control 2021-02-17 05:16:53 +02:00
Stefanos Kornilios Mitsis Poiitidis
d075b689a5
Merge pull request #784 from FEX-Emu/skmp/fix-cvt-cvtt 
OpDisp: Fix cvt/cvtt mapping to dispatcher handlers
 2021-02-17 05:14:44 +02:00
Stefanos Kornilios Mitsis Poiitidis
eb60bda1d3 OpDisp: Fix cvt/cvtt mapping to dispatcher handlers 2021-02-16 11:19:28 +02:00
Stefanos Kornilios Mitsis Poiitidis
8c5d88816f
Merge pull request #781 from FEX-Emu/skmp/hackfix-frem 
X87: FPREM needs to set C2 to 0 to indicate finished iteration
 2021-02-16 09:54:37 +02:00
Ryan Houdek
73e9a35e36
Merge pull request #783 from FEX-Emu/skmp/fix-selects 
Syscalls/x86-32: Fix selects to remarshal the fd_sets
 2021-02-15 23:26:33 -08:00
Stefanos Kornilios Mitsis Poiitidis
568fb3643d Syscalls/x86-32: Fix selects to actually remarshal the sets after running the host syscall 2021-02-16 02:35:38 +02:00
Stefanos Kornilios Mitsis Poiitidis
82367f49e2 X87: FPERM needs to set C2 to 0 to indicate finished iteration 2021-02-16 02:34:52 +02:00
Stefanos Kornilios Mitsis Poiitidis
9f2d49026e
Merge pull request #768 from FEX-Emu/skmp/fix-csgo 
Fixes for Counter Strike Global Offensive
 2021-02-15 03:47:14 +02:00
Stefanos Kornilios Mitsis Poiitidis
bed00d11f1 Tests: Disable pr57275.c because it uses VMOVAPS 2021-02-14 21:36:56 +02:00
Stefanos Kornilios Mitsis Poiitidis
9f0a3dab87
Merge pull request #769 from FEX-Emu/skmp/jit-fallbacks 
x87: Call C++ handlers instead of forcing interpreter
 2021-02-14 21:27:32 +02:00
Stefanos Kornilios Mitsis Poiitidis
07bd2244c7 IR: Remove ShouldInterpret & related logic 2021-02-12 14:21:47 +02:00
Stefanos Kornilios Mitsis Poiitidis
077093eacc JIT/x64: Use xmm0 as temp instead of xmm11, add xmm11 to RA list 2021-02-12 14:15:22 +02:00
Stefanos Kornilios Mitsis Poiitidis
428111b44b JIT/arm64: fallback support 2021-02-12 01:23:15 +02:00
Stefanos Kornilios Mitsis Poiitidis
b564927825 IprOps: Add BCDLOAD, BCDSTORE fallbacks 2021-02-11 19:24:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
b0a046dfcb JIT/IPR: Add fallbacks for almost all x87 ops 2021-02-11 18:52:05 +02:00