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drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -451,11 +451,10 @@ nv50_graph_register(struct drm_device *dev)
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}
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/* compute */
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if (dev_priv->chipset <= 0xa0 ||
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dev_priv->chipset == 0xaa ||
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dev_priv->chipset == 0xac)
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NVOBJ_CLASS(dev, 0x50c0, GR);
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else
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NVOBJ_CLASS(dev, 0x50c0, GR);
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if (dev_priv->chipset > 0xa0 &&
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dev_priv->chipset != 0xaa &&
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dev_priv->chipset != 0xac)
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NVOBJ_CLASS(dev, 0x85c0, GR);
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dev_priv->engine.graph.registered = true;
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