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1042 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Jon Hunter
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7e10cf7436 |
soc/tegra: Move Tegra flowctrl driver
The flowctrl driver is required for both ARM and ARM64 Tegra devices and in order to enable support for it for ARM64, move the Tegra flowctrl driver into drivers/soc/tegra. By moving the flowctrl driver, tegra_flowctrl_init() is now called by via an early initcall and to prevent this function from attempting to mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()' is also added. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Jon Hunter
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07d76e953b |
ARM: tegra: Remove unnecessary inclusion of flowctrl header
The Tegra flowctrl.h header is included unnecessarily by the Tegra sleep.S source file. Remove this unnecessary inclusion. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds
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d4f4cf77b3 |
Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King: - nommu updates from Afzal Mohammed cleaning up the vectors support - allow DMA memory "mapping" for nommu Benjamin Gaignard - fixing a correctness issue with R_ARM_PREL31 relocations in the module linker - add strlen() prototype for the decompressor - support for DEBUG_VIRTUAL from Florian Fainelli - adjusting memory bounds after memory reservations have been registered - unipher cache handling updates from Masahiro Yamada - initrd and Thumb Kconfig cleanups * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (23 commits) ARM: mm: round the initrd reservation to page boundaries ARM: mm: clean up initrd initialisation ARM: mm: move initrd init code out of arm_memblock_init() ARM: 8655/1: improve NOMMU definition of pgprot_*() ARM: 8654/1: decompressor: add strlen prototype ARM: 8652/1: cache-uniphier: clean up active way setup code ARM: 8651/1: cache-uniphier: include <linux/errno.h> instead of <linux/types.h> ARM: 8650/1: module: handle negative R_ARM_PREL31 addends correctly ARM: 8649/2: nommu: remove Hivecs configuration is asm ARM: 8648/2: nommu: display vectors base ARM: 8647/2: nommu: dynamic exception base address setting ARM: 8646/1: mmu: decouple VECTORS_BASE from Kconfig ARM: 8644/1: Reduce "CPU: shutdown" message to debug level ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL ARM: 8639/1: Define KERNEL_START and KERNEL_END ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_ ARM: 8637/1: Adjust memory boundaries after reservations ARM: 8636/1: Cleanup sanity_check_meminfo ARM: add CPU_THUMB_CAPABLE to indicate possible Thumb support ... |
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Florian Fainelli
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64fc2a947a |
ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol
All low-level PM/SMP code using virt_to_phys() should actually use __pa_symbol() against kernel symbols. Update code where relevant to move away from virt_to_phys(). Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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Dmitry Torokhov
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ed0a27ef64 |
ARM: tegra: paz00: Fix __initdata placement
Placement of attributes, such as __initdata, is standardized through the checkpatch script. Fix up this instance to make checkpatch happy. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds
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6f888fe31d |
ARM: SoC cleanups for v4.8
The cleanup branch keeps going down in size as we've completed a lot of the major legacy platform removals and conversions. A handful of changes this time around, some of the themes or larger sets are: - A bunch of i.MX cleanups around platform detection, init call cleanups - Misc fixes of missing/implicit includes - Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXnnwFAAoJEIwa5zzehBx3zXQP/2a/+XkiseeGkEoiX/6FOfhH XTzipye0OYdEe3kVWFL1sVVXRH6a5sbDJRNtfsQc+KdSG5i7LMHWARRJmIx9CTMB oQ9pEbYKSyBQDHBSOZYT6W+qYOI2SdTYqesjd3yn+FY4SIFBpQ/V3axHnMICIRm9 PmHF1QUQEdtQ2Y9+E1vA1mHcPN9enjlesD3VdRbxVPX/PZw63kx9y8ICVq5I/PX9 DfJRcA+PKIYQghhEZ0cx2bEoKozv7W088C7DD1Umw1NN18pMuvvNQGhid80xUqKY 4bmLSGWqwmSzv1WZ/u1pUnBGGQE9YY1U2b8kZy8hSVg9rupxS8Ang0ztZRRE6nk2 4t8GmWuLDH+7PxFv/skzi1AMAx+4KxSfp3N5qyKr8ddmnYrFWmBPj2AeBqrlziw6 8Z41LQULmf/Gs6McikGUP7ryqd15gNtTJO1wlavqFrPe0fyzcHsgqpIy3YCqZiSE wQ4Hc036xqGknmg6GjHWp+W1rHZVGsnXmvnp1IVRoAGqwBqxNi4ItIXE7an8144H NnWFmPRSsGg26MfEJVsbtPQWNtEGqM2lgr6zn9xirC0cVbQ4ZDtWp2q0bJ1v/cLQ sW6Gu6jgVN8YUPp56lBaXJ5RxHE9V1Sqi4/+KghBKWW0X/BIo99b6PVr2bJRrkaq ZvpvsgzbCHdGqTptF9Dw =SfR/ -----END PGP SIGNATURE----- Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "The cleanup branch keeps going down in size as we've completed a lot of the major legacy platform removals and conversions. A handful of changes this time around, some of the themes or larger sets are: - A bunch of i.MX cleanups around platform detection, init call cleanups - Misc fixes of missing/implicit includes - Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits) ARM: mps2: fix typo ARM: s3c64xx: avoid warning about 'struct device_node' bus: mvebu-mbus: make mvebu_mbus_syscore_ops static bus: mvebu-mbus: fix __iomem on register pointers ARM: tegra: Remove board_init_funcs array ARM: iop: Fix indentation ARM: imx: remove cpu_is_mx*() ARM: imx: remove last call to cpu_is_mx5* ARM: imx: rework mx27_pm_init() call ARM: imx: deconstruct mx3_idle ARM: imx: deconstruct mxc_rnga initialization ARM: imx: remove cpu_is_mx1 check ARM: i.MX: Do not explicitly call l2x0_of_init() ARM: i.MX: system.c: Tweak prefetch settings for performance ARM: i.MX: system.c: Replace magic numbers ARM: i.MX: system.c: Remove redundant errata 752271 code ARM: i.MX: system.c: Convert goto to if statement ARM: Kirkwood: fix kirkwood_pm_init() declaration/type ARM: Kirkwood: make kirkwood_disable_mbus_error_propagation() static ARM: orion5x: make orion5x_legacy_handle_irq static ... |
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Arnd Bergmann
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70814a9b32 |
ARM: tegra: Core SoC changes for v4.8-rc1
Some cleanups to eliminate sparse warnings and a section mismatch. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJXg7YdAAoJEN0jrNd/PrOhXy0P/0IEMndWkrubAOvf0bnV4hR0 /SiNGiS+ROyTDd8LkntXJFTgwPzEd/pHUL6z/X2imLvVurAwDP19zEO9rm7CzFaL goOnCSm5VEz6euwzh+i7PYlDYSETZ+Iy+izO3r6vWMJJxsHbYZ5POxJvCM7e14pp V70vRXwSaQqUBzX5jykFmIeypQ1q/o/VeMsEeLfKQXBYqq3Z4F4x91E1UVgopp5z mpE0O1v191ZpwqdFJUfzTBwM7nrDruYNedrw2jCQDcr3O5bmns1IQPymJGLO6iJk rKfL6NXHJD7IH3RH4rd3hW7j2It6crSLbyZSnfNNxC9eFpfgnQk+jXe6/oo712Ng FPwvB0Hy/z+q5hXfEEB9lgxB8AurnLHm5Kt8qxmsdBMsJ0KbL2kUSUrlpOcWcatO QeBAC+mO4Ff4lUM5eCkH9uetmB2TO4/WkCgL0iTQt4Taq4qY/9jS5WABsu0L7htX 2L0jWxffmrNBREysRmXJltV7H9ZujEkGaQcGvdDFtv2nOGVivbw2n8YCB4MIz/1h WLUjNKbm9HhneH/Croxtt7dYytR7tFgEbVXP2+s/nTq2LgQb7iAJZeBV6pp3VY6L aEzYCvRCTDW/QVqnGg97I7dWK//j20oLYN3+PwjrM2dATJ8OIN8Zrk28ljB+9Cto uNsiRRInpuW8t18Y4BMD =ZvUr -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.8-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup Merge "ARM: tegra: Core SoC changes for v4.8-rc1" into next/cleanup: Some cleanups to eliminate sparse warnings and a section mismatch. * tag 'tegra-for-4.8-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Remove board_init_funcs array ARM: tegra: pm: Add tegra_cpu_do_idle() prototype ARM: tegra: irq: Add missing irq.h include ARM: tegra: cpuidle: Add missing cpuidle.h include ARM: tegra: hotplug: Include missing common.h |
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Arnd Bergmann
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da35cbcafa |
ARM: tegra: Remove board_init_funcs array
In a configuration that enables CONFIG_UBSAN_SANITIZE_ALL, I am getting a section mismatch warning for tegra20: WARNING: arch/arm/mach-tegra/built-in.o(.data+0x6e0): Section mismatch in reference from the variable board_init_funcs to the function .init.text:paz00_init() The array is no longer useful here since there is only one entry, so we can simply call the function directly after checking of_machine_is_compatible(). This fixes the section mismatch and is easier to read. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Kefeng Wang
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435ebcbc9f |
arm: use of_platform_default_populate() to populate
Use helper of_platform_default_populate() in linux/of_platform when possible, instead of calling of_platform_populate() with the default match table. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Krzysztof Halasa <khalasa@piap.pl> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ray Jui <rjui@broadcom.com> Cc: Viresh Kumar <vireshk@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Rob Herring <robh@kernel.org> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org> |
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Thierry Reding
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fa45caf2ee |
ARM: tegra: pm: Add tegra_cpu_do_idle() prototype
When building with W=1 this function is flagged as not having a prototype defined. Add the prototype to avoid a build warning. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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4f71a888c5 |
ARM: tegra: irq: Add missing irq.h include
Some of the functions implemented are flagged as not having a prototype defined when building with W=1. Include the header to avoid these build warnings. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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755c47ed94 |
ARM: tegra: cpuidle: Add missing cpuidle.h include
Some of the functions implemented are flagged as not having a prototype defined when building with W=1. Include the header to avoid these build warnings and add a prototype as well as a dummy implementation for the tegra_cpuidle_pcie_irqs_in_use() function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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5c753e0439 |
ARM: tegra: hotplug: Include missing common.h
Some of the functions implemented are flagged as not having a prototype defined when building with W=1. Include the header to avoid these build warnings. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Walleij
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5c34a4e89c |
ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. When ordering the symbols the following rationale was used: if the selects were in alphabetical order, I moved select GPIOLIB to be in alphabetical order, but if the selects were not maintained in alphabetical order, I just replaced "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB". Cc: Michael Büsch <m@bues.ch> Cc: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
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Linus Torvalds
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4a5219edcd |
ARM: SoC driver updates for v4.7
Driver updates for ARM SoCs, these contain various things that touch the drivers/ directory but got merged through arm-soc for practical reasons. For the most part, this is now related to power management controllers, which have not yet been abstracted into a separate subsystem, and typically require some code in drivers/soc or arch/arm to control the power domains. Another large chunk here is a rework of the NVIDIA Tegra USB3.0 support, which was surprisingly tricky and took a long time to get done. Finally, reset controller handling as always gets merged through here as well. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVzuXkGCrR//JCVInAQKb5BAAv2HuJ/tDjC8nNfYi0/aIt4uaRfRWE84t +nIpdKl/pB9AQo+HdG9WNihHs2GN44PdQRrDZ1enQX8nvTzc+dUl0AI1GZmUDpF/ zCV2UJ39HMZcEPwf8lZk9X/JP4VOkJDM5pDgNZnnqdvkq0oqtKzmh0Kt6m2g6fIS LR3FVtCRxJDeT+pT+EpoN4jpW0cb3mjTWbn/a8Ar3BH07KBA3U22MVJhHArLjS30 /aXP+AkgdvlgmBher5z44N6Qd/KOLn78rnE4LCRC4FwSCqA+qqPJQNGNblV5MHjE s5CYTqlihqLiGapqJ4zGBhmqj0XU/3kFVboGqYlTGjzMkOFgjddTpMdfkBUoG5oJ UubJ51zzSLXTcMwILGNXVls4YjJRKwNH7jeSjuMqpWrAYP4qBcMn/HQ1GqUjkNv+ yWkheHiLDYgYkIDOBDuFUtJ7OXiVumGGxIE+r2K/sXeNI7gFcDxFExMIo11vPAWP WJ8ydTchyb/RUQbzhjEXhoIeCZwXQfe9s11qsyFQDCZLleWYQGs3gFKdEI1E7+BE oe018BSP+uaVXdaV18Ne4smwzydLAU9/ieUoO45PAUSN2reV4lWhFTlNiiiMd3Id IWoYwpxqP2VW9zJvLz6QGF/P+3cZ00m/1lecJCKHHPBmbUijCHWJmgLT73AdSXmR YIJ2UM5QMiY= =x+iD -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs, these contain various things that touch the drivers/ directory but got merged through arm-soc for practical reasons. For the most part, this is now related to power management controllers, which have not yet been abstracted into a separate subsystem, and typically require some code in drivers/soc or arch/arm to control the power domains. Another large chunk here is a rework of the NVIDIA Tegra USB3.0 support, which was surprisingly tricky and took a long time to get done. Finally, reset controller handling as always gets merged through here as well" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) arm-ccn: Enable building as module soc/tegra: pmc: Add generic PM domain support usb: xhci: tegra: Add Tegra210 support usb: xhci: Add NVIDIA Tegra XUSB controller driver dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding PCI: tegra: Support per-lane PHYs dt-bindings: pci: tegra: Update for per-lane PHYs phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs drivers: firmware: psci: make two helper functions inline soc: renesas: rcar-sysc: Add support for R-Car H3 power areas soc: renesas: rcar-sysc: Add support for R-Car E2 power areas soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas soc: renesas: rcar-sysc: Add support for R-Car H2 power areas ... |
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Heikki Krogerus
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f4d0526603 |
device property: don't bother the drivers with struct property_set
Since device_add_property_set() now always takes a copy of the property_set, and also since the fwnode type is always hard coded to be FWNODE_PDATA, there is no need for the drivers to deliver the entire struct property_set. The function can just create the instance of it on its own and bind the properties from the drivers to it on the spot. This renames device_add_property_set() to device_add_properties(). The function now takes struct property_entry as its parameter instead of struct property_set. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Jon Hunter
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0a2d87e047 |
soc/tegra: pmc: Wait for powergate state to change
Currently, the function tegra_powergate_set() simply sets the desired powergate state but does not wait for the state to change. In most cases we should wait for the state to change before proceeding. Currently, there is a case for Tegra114 and Tegra124 devices where we do not wait when starting the secondary CPU as this is not necessary. However, this is only done at boot time and so waiting here will only have a small impact on boot time. Therefore, update tegra_powergate_set() to wait when setting the powergate. By adding this feature, we can also eliminate the polling loop from tegra30_boot_secondary(). A function has been added for checking the status of the powergate and so update the tegra_powergate_is_powered() to use this macro as well. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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David S. Miller
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d67703fced |
Here's another round of updates for -next:
* big A-MSDU RX performance improvement (avoid linearize of paged RX) * rfkill changes: cleanups, documentation, platform properties * basic PBSS support in cfg80211 * MU-MIMO action frame processing support * BlockAck reordering & duplicate detection offload support * various cleanups & little fixes -----BEGIN PGP SIGNATURE----- iQIcBAABCgAGBQJW0LZ0AAoJEGt7eEactAAdde0P/2meIOehuHBuAtL7REVoNhri bz9eSHMTg+ozCspL7F6vW1ifDI9AaJEaqJccmriueE/UQVC3VXRPGRJ4SFCwZGo9 Zrtys2v9wOq0+XhxyN65Ucf41O9F/5FFabR5OFbf/pZhW5b2cubEjD1P4BB76Iya 8O6wf9oDDjt3zJgYK+sygm3k9wtDVrH3qEbj8IDnCy22P7010qCsfok9swfaq8OB DBgb6BVfDOFTNXvJGH5fRuUKZdtovzzxorXnoG+zjmKmFdMVdgIYj9+2QfnMjW03 B4/W85svcLLH8V3lHZc4G8oKM4J4XtjH1PskKIMF7ThJsKGMf8tL2vpt9rr8iscd Y9SwTEGc9JmhL7n2FaQFlY6ScLcp4ML+2rXxDOMpBmgF3Ne3yfBsJhLKZEl8vSfI mKhzGXpUKjJxJWIxkR0ylJy4/zHeIXkgRlUEhb8t+jgAqvOBTwiVY+vljHCDUERa sH40r1OqnGJtOHkSRqXSpxwXW+eKgyDd7fnnRX/tyttp2Fuew27/fN63SjpsfN6O 3lfSM5bl3FcCKx7vqTLuqzsoqGvDDYkSq6GDfKDqeZIk0vaXA3SJNEOKgymFWQfR rzsaXvTbBT34GYRg3xS2NCxlmcBPemei/q0x6ZOffxhF41Qpqjs1dPB1Yq3AW4jD HGF+NdRbWEqEFVIjQa8w =JHOe -----END PGP SIGNATURE----- Merge tag 'mac80211-next-for-davem-2016-02-26' of git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next Johannes Berg says: ==================== Here's another round of updates for -next: * big A-MSDU RX performance improvement (avoid linearize of paged RX) * rfkill changes: cleanups, documentation, platform properties * basic PBSS support in cfg80211 * MU-MIMO action frame processing support * BlockAck reordering & duplicate detection offload support * various cleanups & little fixes ==================== Signed-off-by: David S. Miller <davem@davemloft.net> |
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Heikki Krogerus
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d54bbaf45a |
ARM: tegra: use build-in device properties with rfkill_gpio
Pass the rfkill name and type to the device with properties instead of driver specific platform data. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> CC: Alexandre Courbot <gnurou@gmail.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Johannes Berg <johannes.berg@intel.com> |
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Olof Johansson
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d0ac6119aa |
ARM: tegra: Core SoC changes for v4.5-rc1
The big thing here is Tegra210 support, which is really only the Kconfig symbol. Other than that there's a few miscellaneous fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJWcqt1AAoJEN0jrNd/PrOhylsQAI8Kg2TNG2e+vhHm6SWG5hW9 jXzKDKl21vLWxP9s1Gmorn59+T8Lo79031sqCAPApYHCBm52M/vv2RYac2SJPvKm cD58O/dJM73/MZWFpMi8YS6fMsfAnAOa7DLIIEADkN7LzPRWJlWiylA9HxM0zm/1 mc7dGtOmK1fnwgdJvi0Lu1BVBy7QIrQ5dVHblph6Zg+QGkjk7xSnCLikwxTdTQ44 3GFKPWri4t/rMWrtHQzVc3jq5W1qSFeLp43ehev+uxPjGzRDGRTfWntvTbNZ0gs+ qS64dGr6ptv195bOr85pkyTbx41wQ8yEooua/u3OdiSMri1pcXTT0fTFHQ5qhYaQ awyjLVSKJqMN0VRCrcioYWDnUHs98nWqQz8j/AY1ko5hAe3bf74VelBDAPhtCMVB sxM1GvcQDoBHNlgFEJpI8IaDLRNv3GmIZejl5vJd6olvWqIveY+XKtI8tEfnkH5E ibnFtNV26Eb5s/4M20ZbRLPyHFrF33SBo9yGHef9OI7k26aAnQSHfgmVRCvYTqYh GRAmg50iPNkzX84xPvaITXjNAa3w7MKY411//7eSP810m757Hliv6FlrtoMNnOJZ 7hy+kcuFMRWfYykGfk1sVvfwpeq/dk7iiKvyrArRKtTYQjcjjCT8h1oUyfhSVuqZ +WohzBaSINH5sTWgaeef =zr7c -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into late/tegra ARM: tegra: Core SoC changes for v4.5-rc1 The big thing here is Tegra210 support, which is really only the Kconfig symbol. Other than that there's a few miscellaneous fixes. * tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: select USB_ULPI from EHCI rather than platform ARM: tegra: Ensure entire dcache is flushed on entering LP0/1 amba: Hide TEGRA_AHB symbol soc/tegra: Add Tegra210 support soc/tegra: Provide per-SoC Kconfig symbols Signed-off-by: Olof Johansson <olof@lixom.net> |
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|
Masahiro Yamada
|
e324654294 |
ARM: use "depends on" for SoC configs instead of "if" after prompt
Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.
Please notice the difference between
config ARCH_FOO
bool "Foo SoCs" if ARCH_MULTI_V7
and
config ARCH_FOO
bool "Foo SoCs"
depends on ARCH_MULTI_V7
These two are *not* equivalent!
In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7. So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns. This is probably not what
you want.
The former should be used only when you need to do so, and you really
understand what you are doing. (In most cases, it should be wrong!)
For enabling/disabling sub-architectures, the latter is always correct.
As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).
[Arnd: I note that there is not really a bug here, according to
the discussion that followed, but I can see value in being consistent
and in making the lines shorter]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Halasa <khc@piap.pl>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Masahiro Yamada
|
75305275a7 |
ARM: use const and __initconst for smp_operations
These smp_operations structures are not over-written, so add "const" qualifier and replace __initdata with __initconst. Also, add "static" where it is possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> # qcom part Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|
Arnd Bergmann
|
a262e87ff3 |
ARM: tegra: select USB_ULPI from EHCI rather than platform
For historic reasons, the tegra platform selects USB_ULPI from architecture code, but that hasn't really made sense for a long time, as the only user of that code is the Tegra EHCI driver that has its own Kconfig symbol. This removes the 'select' statements from mach-tegra and drivers/soc/tegra and adds them with the device driver that actually needs them. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Jon Hunter
|
5883ac2010 |
ARM: tegra: Ensure entire dcache is flushed on entering LP0/1
Tegra support several low-power (LPx) states, which are: - LP0: CPU + Core voltage off and DRAM in self-refresh - LP1: CPU voltage off and DRAM in self-refresh - LP2: CPU voltage off When entering any of the above states the tegra_disable_clean_inv_dcache() function is called to flush the dcache. The function tegra_disable_clean_inv_dcache() will either flush the entire data cache or up to the Level of Unification Inner Shareable (LoUIS) depending on the value in r0. When tegra_disable_clean_inv_dcache() is called by tegra20_sleep_core_finish() or tegra30_sleep_core_finish(), to enter LP0 and LP1 power state, the r0 register contains a physical memory address which will not be equal to TEGRA_FLUSH_CACHE_ALL (1) and so the data cache will be only flushed to the LoUIS. However, when tegra_disable_clean_inv_dcache() called by tegra_sleep_cpu_finish() to enter to LP2 power state, r0 is set to TEGRA_FLUSH_CACHE_ALL to flush the entire dcache. Please note that tegra20_sleep_core_finish(), tegra30_sleep_core_finish() and tegra_sleep_cpu_finish() are called by the boot CPU once all other CPUs have been disabled and so it seems appropriate to flush the entire cache at this stage. Therefore, ensure that r0 is set to TEGRA_FLUSH_CACHE_ALL when calling tegra_disable_clean_inv_dcache() from tegra20_sleep_core_finish() and tegra30_sleep_core_finish(). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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|
Thierry Reding
|
099a6644f5 |
soc/tegra: Provide per-SoC Kconfig symbols
Move per-SoC generation Kconfig symbols to drivers/soc/tegra/Kconfig to gather them all in a single place. This directory is a natural location for these options since it already contains the drivers that are shared across 32-bit and 64-bit ARM architectures. Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Linus Torvalds
|
56e0464980 |
ARM: SoC platform updates for v4.4
New and/or improved SoC support for this release:
- Marvell Berlin:
* Enable standard DT-based cpufreq
* Add CPU hotplug support
- Freescale:
* Ethernet init for i.MX7D
* Suspend/resume support for i.MX6UL
- Allwinner:
* Support for R8 chipset (used on NTC's $9 C.H.I.P board)
- Mediatek:
* SMP support for some platforms
- Uniphier:
* L2 support
* Cleaned up SMP support, etc.
+ A handful of other patches around above functionality, and a few other
smaller changes.
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"New and/or improved SoC support for this release:
Marvell Berlin:
- Enable standard DT-based cpufreq
- Add CPU hotplug support
Freescale:
- Ethernet init for i.MX7D
- Suspend/resume support for i.MX6UL
Allwinner:
- Support for R8 chipset (used on NTC's $9 C.H.I.P board)
Mediatek:
- SMP support for some platforms
Uniphier:
- L2 support
- Cleaned up SMP support, etc.
plus a handful of other patches around above functionality, and a few
other smaller changes"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits)
ARM: uniphier: rework SMP operations to use trampoline code
ARM: uniphier: add outer cache support
Documentation: EXYNOS: Update bootloader interface on exynos542x
ARM: mvebu: add broken-idle option
ARM: orion5x: use mac_pton() helper
ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned
ARM: sunxi: Add R8 support
ARM: digicolor: select pinctrl/gpio driver
arm: berlin: add CPU hotplug support
arm: berlin: use non-self-cleared reset register to reset cpu
ARM: mediatek: add smp bringup code
ARM: mediatek: enable gpt6 on boot up to make arch timer working
soc: mediatek: Fix random hang up issue while kernel init
soc: ti: qmss: make acc queue support optional in the driver
soc: ti: add firmware file name as part of the driver
Documentation: dt: soc: Add description for knav qmss driver
ARM: S3C64XX: Use PWM lookup table for mach-smartq
ARM: S3C64XX: Use PWM lookup table for mach-hmt
ARM: S3C64XX: Use PWM lookup table for mach-crag6410
ARM: S3C64XX: Use PWM lookup table for smdk6410
...
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||
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Stephen Boyd
|
b96fc2f3c1 |
ARM: Remove __ref on hotplug cpu die path
Now that __cpuinit has been removed, the __ref markings on these functions are useless. Remove them. This also reduces the size of the multi_v7_defconfig image: $ size before after text data bss dec hex filename 12683578 1470996 348904 14503478 dd4e36 before 12683274 1470996 348904 14503174 dd4d06 after presumably because now we don't have to jump to code in the .ref.text section and/or the noinline marking is removed. Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: <linux-omap@vger.kernel.org> Cc: <linux-arm-msm@vger.kernel.org> Cc: <spear-devel@list.st.com> Cc: <linux-tegra@vger.kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua@kernel.org> Acked-by: Andy Gross <agross@codeaurora.org> Acked-by: Viresh Kumar <vireshk@kernel.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
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Dmitry Osipenko
|
e77b675f87 |
ARM: tegra: paz00: use con_id's to refer GPIO's in gpiod_lookup table
Commit |
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Linus Torvalds
|
102178108e |
ARM: SoC driver updates for v4.3
Some releases this branch is nearly empty, others we have more stuff. It
tends to gather drivers that need SoC modification or dependencies such
that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- Memory controller work for ARM's PL172 memory controller
- Reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Some releases this branch is nearly empty, others we have more stuff.
It tends to gather drivers that need SoC modification or dependencies
such that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- memory controller work for ARM's PL172 memory controller
- reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
per-SoC support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
ARM: tegra: Disable cpuidle if PSCI is available
soc/tegra: pmc: Use existing pclk reference
soc/tegra: pmc: Remove unnecessary return statement
soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
memory: tegra: Add Tegra210 support
memory: tegra: Add support for a variable-size client ID bitfield
clk: shmobile: rz: Add CPG/MSTP Clock Domain support
clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
clk: shmobile: Add CPG/MSTP Clock Domain support
ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
MIPS: ath79: Add the reset controller to the AR9132 dtsi
reset: Add a driver for the reset controller on the AR71XX/AR9XXX
devicetree: Add bindings for the ATH79 reset controller
reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
doc: dt: add documentation for lpc1850-rgu reset driver
...
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||
|
Tomeu Vizoso
|
1ec0e115f8 |
ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
This callback is expected to do the same as enter() but it has to guarantee that interrupts aren't enabled at any point in its execution, as the tick is frozen. It will be called when the system goes to suspend-to-idle and will reduce power usage because CPUs won't be awaken for unnecessary IRQs. By setting the CPUIDLE_FLAG_TIMER_STOP flag, we can reuse the same code for both the enter() and enter_freeze() callbacks. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
|
fc0cf17734 |
ARM: tegra: Disable cpuidle if PSCI is available
This is only relevant on Tegra114 and Tegra124, because earlier Tegra generations used Cortex-A9 without secure extensions. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
|
7e939de1b2 |
soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers
Unifying the drivers makes it easier to restrict the legacy probing paths to 32-bit ARM. This in turn will come in handy as support for new 64-bit ARM SoCs is added. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Tuomas Tynkkynen
|
fa63aa3dea |
clk: tegra: Add functions for parsing CVB tables
Tegra CVB tables encode the relationship between operating voltage and optimal frequency as a function of the so-called speedo value. The speedo value is written to the on-chip fuses at the factory, which allows the voltage-frequency operating points to be calculated on an per-chip basis. Add utility functions to parse the Tegra-specific tables and export the voltage-frequency pairs to the generic OPP framework for other drivers to use. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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|
Linus Torvalds
|
4aa705b18b |
ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC Conflicts: arch/arm/mach-socfpga/core.h Trivial remove/remove conflict with our cleanup branch. Resolution: remove both sides -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J 0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1 O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38 kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth 17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ GPeeJrJaYQsDvTrO8wjU =ZtPK -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ... |
||
|
Kevin Hilman
|
e75ea4569d |
Merge branch 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup
* 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm: ARM: fix EFM32 build breakage caused by cpu_resume_arm ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state ARM: v7 setup function should invalidate L1 cache |
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|
Russell King
|
02b4e2756e |
ARM: v7 setup function should invalidate L1 cache
All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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David Riley
|
7892158a96 |
soc/tegra: pmc: move to using a restart handler
The pmc driver was previously exporting tegra_pmc_restart, which was assigned to machine_desc.init_machine, taking precedence over the restart handlers registered through register_restart_handler(). Signed-off-by: David Riley <davidriley@chromium.org> [tomeu.vizoso@collabora.com: Rebased] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: minor cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com> |
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|
Thierry Reding
|
85aa5047e3 |
ARM: tegra: Fix typo (reset -> rest) in comment
Easy typo to make when you're working in this area of the code. Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|
Dmitry Osipenko
|
4d48edb3c3 |
ARM: tegra20: Store CPU "resettable" status in IRAM
Commit |
||
|
Linus Torvalds
|
2481bc7528 |
Power management and ACPI updates for v4.1-rc1
- Generic PM domains support update including new PM domain
callbacks to handle device initialization better (Russell King,
Rafael J Wysocki, Kevin Hilman).
- Unified device properties API update including a new mechanism
for accessing data provided by platform initialization code
(Rafael J Wysocki, Adrian Hunter).
- ARM cpuidle update including ARM32/ARM64 handling consolidation
(Daniel Lezcano).
- intel_idle update including support for the Silvermont Core in
the Baytrail SOC and for the Airmont Core in the Cherrytrail and
Braswell SOCs (Len Brown, Mathias Krause).
- New cpufreq driver for Hisilicon ACPU (Leo Yan).
- intel_pstate update including support for the Knights Landing
chip (Dasaratharaman Chandramouli, Kristen Carlson Accardi).
- QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann).
- powernv cpufreq driver update (Shilpasri G Bhat).
- devfreq update including Tegra support changes (Tomeu Vizoso,
MyungJoo Ham, Chanwoo Choi).
- powercap RAPL (Running-Average Power Limit) driver update
including support for Intel Broadwell server chips (Jacob Pan,
Mathias Krause).
- ACPI device enumeration update related to the handling of the
special PRP0001 device ID allowing DT-style 'compatible' property
to be used for ACPI device identification (Rafael J Wysocki).
- ACPI EC driver update including limited _DEP support (Lan Tianyu,
Lv Zheng).
- ACPI backlight driver update including a new mechanism to allow
native backlight handling to be forced on non-Windows 8 systems
and a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede).
- New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu).
- Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger,
Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki).
- Fixes related to suspend-to-idle for the iTCO watchdog driver and
the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu).
- PM tracing support for the suspend phase of system suspend/resume
transitions (Zhonghui Fu).
- Configurable delay for the system suspend/resume testing facility
(Brian Norris).
- PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki).
/
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Merge tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael Wysocki:
"These are mostly fixes and cleanups all over, although there are a few
items that sort of fall into the new feature category.
First off, we have new callbacks for PM domains that should help us to
handle some issues related to device initialization in a better way.
There also is some consolidation in the unified device properties API
area allowing us to use that inferface for accessing data coming from
platform initialization code in addition to firmware-provided data.
We have some new device/CPU IDs in a few drivers, support for new
chips and a new cpufreq driver too.
Specifics:
- Generic PM domains support update including new PM domain callbacks
to handle device initialization better (Russell King, Rafael J
Wysocki, Kevin Hilman)
- Unified device properties API update including a new mechanism for
accessing data provided by platform initialization code (Rafael J
Wysocki, Adrian Hunter)
- ARM cpuidle update including ARM32/ARM64 handling consolidation
(Daniel Lezcano)
- intel_idle update including support for the Silvermont Core in the
Baytrail SOC and for the Airmont Core in the Cherrytrail and
Braswell SOCs (Len Brown, Mathias Krause)
- New cpufreq driver for Hisilicon ACPU (Leo Yan)
- intel_pstate update including support for the Knights Landing chip
(Dasaratharaman Chandramouli, Kristen Carlson Accardi)
- QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann)
- powernv cpufreq driver update (Shilpasri G Bhat)
- devfreq update including Tegra support changes (Tomeu Vizoso,
MyungJoo Ham, Chanwoo Choi)
- powercap RAPL (Running-Average Power Limit) driver update including
support for Intel Broadwell server chips (Jacob Pan, Mathias Krause)
- ACPI device enumeration update related to the handling of the
special PRP0001 device ID allowing DT-style 'compatible' property
to be used for ACPI device identification (Rafael J Wysocki)
- ACPI EC driver update including limited _DEP support (Lan Tianyu,
Lv Zheng)
- ACPI backlight driver update including a new mechanism to allow
native backlight handling to be forced on non-Windows 8 systems and
a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede)
- New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu)
- Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger,
Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki)
- Fixes related to suspend-to-idle for the iTCO watchdog driver and
the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu)
- PM tracing support for the suspend phase of system suspend/resume
transitions (Zhonghui Fu)
- Configurable delay for the system suspend/resume testing facility
(Brian Norris)
- PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki)"
* tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (74 commits)
ACPI / scan: Fix NULL pointer dereference in acpi_companion_match()
ACPI / scan: Rework modalias creation when "compatible" is present
intel_idle: mark cpu id array as __initconst
powercap / RAPL: mark rapl_ids array as __initconst
powercap / RAPL: add ID for Broadwell server
intel_pstate: Knights Landing support
intel_pstate: remove MSR test
cpufreq: fix qoriq uniprocessor build
ACPI / scan: Take the PRP0001 position in the list of IDs into account
ACPI / scan: Simplify acpi_match_device()
ACPI / scan: Generalize of_compatible matching
device property: Introduce firmware node type for platform data
device property: Make it possible to use secondary firmware nodes
PM / watchdog: iTCO: stop watchdog during system suspend
cpufreq: hisilicon: add acpu driver
ACPI / EC: Call acpi_walk_dep_device_list() after installing EC opregion handler
cpufreq: powernv: Report cpu frequency throttling
intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs
intel_idle: Update support for Silvermont Core in Baytrail SOC
PM / devfreq: tegra: Register governor on module init
...
|
||
|
Linus Torvalds
|
8954672d86 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq core updates from Thomas Gleixner:
"Managerial summary:
Core code:
- final removal of IRQF_DISABLED
- new state save/restore functions for virtualization support
- wakeup support for stacked irqdomains
- new function to solve the netpoll synchronization problem
irqchips:
- new driver for STi based devices
- new driver for Vybrid MSCM
- massive cleanup of the GIC driver by moving the GIC-addons to
stacked irqdomains
- the usual pile of fixes and updates to the various chip drivers"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
irqchip: GICv3: Add support for irq_[get, set]_irqchip_state()
irqchip: GIC: Add support for irq_[get, set]_irqchip_state()
genirq: Allow the irqchip state of an IRQ to be save/restored
genirq: MSI: Fix freeing of unallocated MSI
irqchip: renesas-irqc: Add wake-up support
irqchip: armada-370-xp: Allow using wakeup source
irqchip: mips-gic: Add new functions to start/stop the GIC counter
irqchip: tegra: Add Tegra210 support
irqchip: digicolor: Move digicolor_set_gc to init section
irqchip: renesas-irqc: Add functional clock to bindings
irqchip: renesas-irqc: Add minimal runtime PM support
irqchip: renesas-irqc: Add more register documentation
DT: exynos: update PMU binding
ARM: exynos4/5: convert pmu wakeup to stacked domains
irqchip: gic: Don't complain in gic_get_cpumask() if UP system
ARM: zynq: switch from gic_arch_extn to gic_set_irqchip_flags
ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags
ARM: shmobile: remove use of gic_arch_extn.irq_set_wake
irqchip: gic: Add an entry point to set up irqchip flags
ARM: omap: convert wakeupgen to stacked domains
...
|
||
|
Thomas Gleixner
|
a0b4122447 |
ARM: Tegra: Use explicit broadcast oneshot control function
Replace the clockevents_notify() call with an explicit function call. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Link: http://lkml.kernel.org/r/2131111.rjxRLX1eZB@vostro.rjw.lan Signed-off-by: Ingo Molnar <mingo@kernel.org> |
||
|
Daniel Lezcano
|
eeebc3bb4d |
ARM: cpuidle: Remove duplicate header inclusion
The cpu_do_idle() function is always used by the cpuidle drivers. That led to have each driver including cpuidle.h and proc-fns.h, they are always paired. That makes a lot of duplicate headers inclusion. Instead of including both in each .c file, move the proc-fns.h header inclusion in the cpuidle.h header file directly, so we can save some line of code. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
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|
Marc Zyngier
|
1a703bffd8 |
ARM: tegra: remove old LIC support
Now that all DTs have been updated, entierely drop support for the non-DT code. This is likely to break platforms that do not update their DT, so print a warning at boot time. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-7-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
||
|
Marc Zyngier
|
e9479e0e83 |
ARM: tegra: skip gic_arch_extn setup if DT has a LIC node
If we detect that our DT has a LIC node, don't setup gic_arch_extn, and skip tegra_legacy_irq_syscore_init as well. This is only a temporary measure until that code is removed for good. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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|
Marc Zyngier
|
b3aa14c399 |
ARM: tegra: irq: nuke leftovers from non-DT support
The GIC is now always initialized from DT on tegra, and there is no point in keeping non-DT init code. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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|
Linus Torvalds
|
18a8d49973 |
The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
devices. Additionaly the framework core underwent a bit of surgery with
two major changes. The boundary between the clock core and clock
providers (e.g clock drivers) is now more well defined with dedicated
provider helper functions. struct clk no longer maps 1:1 with the
hardware clock but is a true per-user cookie which helps us tracker
users of hardware clocks and debug bad behavior. The second major change
is the addition of rate constraints for clocks. Rate ranges are now
supported which are analogous to the voltage ranges in the regulator
framework. Unfortunately these changes to the core created some
breakeage. We think we fixed it all up but for this reason there are
lots of last minute commits trying to undo the damage.
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Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux
Pull clock framework updates from Mike Turquette:
"The clock framework changes contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
devices.
Additionally the framework core underwent a bit of surgery with two
major changes:
- The boundary between the clock core and clock providers (e.g clock
drivers) is now more well defined with dedicated provider helper
functions. struct clk no longer maps 1:1 with the hardware clock
but is a true per-user cookie which helps us tracker users of
hardware clocks and debug bad behavior.
- The addition of rate constraints for clocks. Rate ranges are now
supported which are analogous to the voltage ranges in the
regulator framework.
Unfortunately these changes to the core created some breakeage. We
think we fixed it all up but for this reason there are lots of last
minute commits trying to undo the damage"
* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
clk: Only recalculate the rate if needed
Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
clk: qoriq: Add support for the platform PLL
powerpc/corenet: Enable CLK_QORIQ
clk: Replace explicit clk assignment with __clk_hw_set_clk
clk: Add __clk_hw_set_clk helper function
clk: Don't dereference parent clock if is NULL
MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
clk: shmobile: div6: Avoid division by zero in .round_rate()
clk: mxs: Fix invalid 32-bit access to frac registers
clk: omap: compile legacy omap3 clocks conditionally
clkdev: Export clk_register_clkdev
clk: Add rate constraints to clocks
clk: remove clk-private.h
pci: xgene: do not use clk-private.h
arm: omap2+ remove dead clock code
clk: Make clk API return per-user struct clk instances
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
clk: tegra: Add support for the Tegra132 CAR IP block
...
|
||
|
Peter De Schrijver
|
d0a57bd5b5 |
clk: tegra: make tegra_clocks_apply_init_table() arch_initcall
tegra_clocks_apply_init_table() needs to be called after the udelay
loop has been calibrated (see commit
|
||
|
Thierry Reding
|
910978e753 |
clocksource: Build Tegra timer on 32-bit ARM only
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds
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92a578b064 |
ACPI and power management updates for 3.19-rc1
This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come
from as long as the platform firmware (either DT or ACPI) makes
them available. It covers both devices and "bare" device node
objects without struct device representation as that turns out to
be necessary in some cases. This has been in the works for quite
a few months (and development cycles) and has been approved by
all of the relevant maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO information
in their ACPI tables, but don't assign names to GPIO lines (in which
case the driver needs to do that on the basis of what it knows about
the device in question). That also has been approved by the GPIO
core maintainers and the rfkill driver is now going to use it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by
the processor in which case it will be enabled by default. However,
it can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller).
The support added this time is sufficient to make the ACPI battery
driver work on Asus T100A, but it is general enough to be able to
cover some other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver
for Intel platforms should be able to handle power management of
the DMA engine correctly, the cpufreq-dt driver should interact
with the thermal subsystem in a better way and the ACPI backlight
driver should handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions
in the ACPICA's interrupt handling code which might lead to some
random and strange looking failures on some systems.
In the cleanups department the most visible part is the series
of commits targeted at getting rid of the CONFIG_PM_RUNTIME
configuration option. That was triggered by a discussion
regarding the generic power domains code during which we realized
that trying to support certain combinations of PM config options
was painful and not really worth it, because nobody would use them
in production anyway. For this reason, we decided to make
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the
conclusion that the latter became redundant and CONFIG_PM could
be used instead of it. The material here makes that replacement
in a major part of the tree, but there will be at least one more
batch of that in the second part of the merge window.
Specifics:
- Support for retrieving device properties information from ACPI
_DSD device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that.
As stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers
are now going to use this new interface and the GPIO subsystem
is additionally modified to allow device drivers to assign names
to GPIO resources returned by ACPI _CRS objects (in case _DSD is
not present or does not provide the expected data). The changes
in this set are mostly from Mika Westerberg, Rafael J Wysocki,
Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions
used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management
(Aaron Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects
and deferred probing support for the ACPI battery driver based
on the _DEP information to make that driver work on Asus T100A
(Lan Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling
code and in the ACPI code related to system suspend and resume
(Lv Zheng and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had
been allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in
that code with synchronize_rcu_expedited() which makes the issue
go away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly.
The problem is that the DMA engine doesn't have ACPI PM support
of its own and it simply is turned off when the last LPSS device
having ACPI PM support goes into D3cold. To work around that,
the PM domain used by the ACPI LPSS driver is redesigned so at
least one device with ACPI PM support will be on as long as the
DMA engine is in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and
Ashwin Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver
fixes and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at
probe time (Ulf Hansson).
- Preliminary support for controlling device clocks from the
generic power domains core code and modifications of the
ARM/shmobile platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power
domains core code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control
code in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and
a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu,
James Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to
allow OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and
Markus Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava).
/
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Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come from
as long as the platform firmware (either DT or ACPI) makes them
available. It covers both devices and "bare" device node objects
without struct device representation as that turns out to be necessary
in some cases. This has been in the works for quite a few months (and
development cycles) and has been approved by all of the relevant
maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO
information in their ACPI tables, but don't assign names to GPIO lines
(in which case the driver needs to do that on the basis of what it
knows about the device in question). That also has been approved by
the GPIO core maintainers and the rfkill driver is now going to use
it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by the
processor in which case it will be enabled by default. However, it
can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller). The
support added this time is sufficient to make the ACPI battery driver
work on Asus T100A, but it is general enough to be able to cover some
other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for
Intel platforms should be able to handle power management of the DMA
engine correctly, the cpufreq-dt driver should interact with the
thermal subsystem in a better way and the ACPI backlight driver should
handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions in the
ACPICA's interrupt handling code which might lead to some random and
strange looking failures on some systems.
In the cleanups department the most visible part is the series of
commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration
option. That was triggered by a discussion regarding the generic
power domains code during which we realized that trying to support
certain combinations of PM config options was painful and not really
worth it, because nobody would use them in production anyway. For
this reason, we decided to make CONFIG_PM_SLEEP select
CONFIG_PM_RUNTIME and that lead to the conclusion that the latter
became redundant and CONFIG_PM could be used instead of it. The
material here makes that replacement in a major part of the tree, but
there will be at least one more batch of that in the second part of
the merge window.
Specifics:
- Support for retrieving device properties information from ACPI _DSD
device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that. As
stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are
now going to use this new interface and the GPIO subsystem is
additionally modified to allow device drivers to assign names to
GPIO resources returned by ACPI _CRS objects (in case _DSD is not
present or does not provide the expected data). The changes in
this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron
Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions used
by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management (Aaron
Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects and
deferred probing support for the ACPI battery driver based on the
_DEP information to make that driver work on Asus T100A (Lan
Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling code
and in the ACPI code related to system suspend and resume (Lv Zheng
and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had been
allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in that
code with synchronize_rcu_expedited() which makes the issue go
away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly. The
problem is that the DMA engine doesn't have ACPI PM support of its
own and it simply is turned off when the last LPSS device having
ACPI PM support goes into D3cold. To work around that, the PM
domain used by the ACPI LPSS driver is redesigned so at least one
device with ACPI PM support will be on as long as the DMA engine is
in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin
Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver fixes
and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at probe
time (Ulf Hansson).
- Preliminary support for controlling device clocks from the generic
power domains core code and modifications of the ARM/shmobile
platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power domains core
code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control code
in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a
new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James
Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to allow
OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and Markus
Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava)"
* tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits)
i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c
dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
tools: cpupower: fix return checks for sysfs_get_idlestate_count()
drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME
MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
leds: leds-gpio: Fix multiple instances registration without 'label' property
iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hwrandom / exynos / PM: Use CONFIG_PM in #ifdef
block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
USB / PM: Drop CONFIG_PM_RUNTIME from the USB core
PM: Merge the SET*_RUNTIME_PM_OPS() macros
...
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