Currently, the receive processing reads ->byte_cnt twice (once to
update interface statistics and once to properly size the data area
of the received skb), but since receive descriptors live in uncached
memory, caching this value in a local variable saves one uncached
access, and increases routing performance a tiny little bit more.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Since the size of the receive queue is directly related to the data
cache footprint of the driver (between refilling a receive ring entry
with a fresh skb and receiving a packet in that entry, queue_size - 1
other skbs will have been touched), shrink the default receive queue
size to a saner number of entries, as 400 is definite overkill for
almost all workloads.
While we are at it, trim the default transmit queue size a bit as well.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Get rid of the skb pointer array that we currently use for transmit
reclaim, and replace it with an skb queue, to which skbuffs are appended
when they are passed to the xmit function, and removed from the front
and freed when we do transmit queue reclaim and hit a descriptor with
the 'owned by device' bit clear and 'last descriptor' bit set.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
By moving DMA unmapping during transmit reclaim back under the netif
tx lock, we avoid the situation where we read the DMA address and buffer
length from the descriptor under the lock and then not do anything with
that data after dropping the lock on platforms where the DMA unmapping
routines are all NOPs (which is the case on all ARM platforms that
mv643xx_eth is used on at least).
This saves two uncached reads, which makes a small but measurable
performance difference in routing benchmarks.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Since our ->hard_start_xmit() method is already called under spinlock
protection (the netif tx queue lock), we can simply make that lock
cover the private transmit state (descriptor ring indexes et al.) as
well, which avoids having to use a private lock to protect that state.
Since this was the last user of the driver-private spinlock, it can
be killed off.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Move link status handling, transmit reclaim and TX_END handling from
the interrupt handler to the napi poll handler. This allows switching
->lock over to a non-IRQ-safe lock and removes all explicit interrupt
disabling from the driver.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
As all the infrastructure for multiple transmit queues already exists
in the driver, this patch is entirely trivial.
The individual transmit queues are still serialised by the driver's
per-port private spinlock, but that will disappear (i.e. be replaced
by the per-subqueue ->_xmit_lock) in a subsequent patch.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Delete a couple of unused and uninteresting interrupt source mask bits:
- The receive resource underrun interrupt sources are uninteresting
because if we are in out-of-memory mode, we are already dealing with
the issue, and we don't need the hardware to remind us again that we
are out of memory.
- The LINK and PHY interrupt sources can be coalesced into one define,
since we always use them together.
- The transmit resource underrun interrupt source can be disabled since
we never activate the head descriptor of a paged skb until the
fragments are all activated, so transmit underrun during a packet
should never happen.
- The INT_EXT_TX_0 define is never used.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
There is no need to call netif_{stop,wake}_queue() when the link goes
down/up, as the networking already takes care of this internally.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Currently, there are two different fields in the
mv643xx_eth_platform_data struct that together describe the PHY
address -- one field (phy_addr) has the address of the PHY, but if
that address is zero, a second field (force_phy_addr) needs to be
set to distinguish the actual address zero from a zero due to not
having filled in the PHY address explicitly (which should mean
'use the default PHY address').
If we are a bit smarter about the encoding of the phy_addr field,
we can avoid the need for a second field -- this patch does that.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Which top-level unit's SMI interface to use should be a property of
the top-level unit, not of the individual ports. This patch moves the
->shared_smi pointer from the per-port platform data to the global
platform data.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Simplify receive and transmit queue handling by requiring the set
of queue numbers to be contiguous starting from zero.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Get rid of the mv643xx_eth-internal MV643XX_ETH_CHECKSUM_OFFLOAD_TX
compile-time option. Using transmit checksumming is the sane default,
and anyone wanting to disable it should use ethtool(8) instead of
recompiling their kernels.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
By having the receive out-of-memory handling timer schedule the napi
poll handler and then doing oom processing from the napi poll handler,
all code that touches receive state moves to napi context, letting us
get rid of all explicit locking in the receive paths since the only
mutual exclusion we need anymore at that point is protection against
reentering ourselves, which is provided by napi synchronisation.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Make napi unconditional on the receive side, so that we can get rid
of all the locking and local interrupt disabling in the receive path.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
If the platform code has passed us the IRQ number of the mv643xx_eth
top-level error interrupt, use the error interrupt to wait for SMI
access completion instead of polling the SMI busy bit, since SMI bus
accesses can take up to tens of milliseconds.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Since commit 81600eea98 ("mv643xx_eth:
use auto phy polling for configuring (R)(G)MII interface"),
mv643xx_eth no longer does SMI accesses from interrupt context. The
only other callers that do SMI accesses all do them from process
context, which means we can switch the PHY lock from a spinlock to a
mutex, and get rid of the extra locking in some ethtool methods.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Get rid of the modulo operations that are currently used for
computing successive TX/RX descriptor ring indexes.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Using IRQF_SAMPLE_RANDOM for the mv643xx_eth interrupt handler
significantly increases interrupt processing overhead, so get rid
of it.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
When tearing down a DMA mapping for a receive buffer, we should pass
dma_unmap_single() the exact same address that dma_map_single() gave
us when we originally set up the mapping.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The mv643xx_eth hardware ignores the lower three bits of the buffer
size field in receive descriptors, causing the reception of full-sized
packets to fail at some MTUs. Fix this by rounding the size of
allocated receive buffers up to a multiple of eight bytes.
While we are at it, add a bit of extra space to each receive buffer so
that we can handle multiple vlan tags on ingress.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
When we are low on memory, the assumption that every descriptor in the
receive ring will have an skbuff associated with it does not hold.
rxq_process() was assuming that if the receive descriptor it is working
on is not owned by the hardware, it can safely be processed and handed
to the networking stack. But a descriptor in the receive ring not being
owned by the hardware can also happen when we are low on memory and did
not manage to refill the receive ring fully.
This patch changes rxq_process()'s bailout condition from "the first
receive descriptor to be processed is owned by the hardware" to "the
first receive descriptor to be processed is owned by the hardware OR
the number of valid receive descriptors in the ring is zero".
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Nicolas Pitre noted that mv643xx_eth_poll was incorrectly using
non-IRQ-safe locks while checking whether to wake up the netdevice's
transmit queue. Convert the locking to *_irq() variants, since we
are running from softirq context where interrupts are enabled.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Commit 12e4ab79cd ("mv643xx_eth: be
more agressive about RX refill") changed the condition for the receive
out-of-memory timer to be scheduled from "the receive ring is empty"
to "the receive ring is not full".
This can lead to a situation where the receive out-of-memory timer is
pending because a previous rxq_refill() didn't manage to refill the
receive ring entirely as a result of being out of memory, and
rxq_refill() is then called again as a side effect of a packet receive
interrupt, and that rxq_refill() call then again does not succeed to
refill the entire receive ring with fresh empty skbuffs because we are
still out of memory, and then tries to call add_timer() on the already
scheduled out-of-memory timer.
This patch fixes this issue by changing the add_timer() call in
rxq_refill() to a mod_timer() call. If the OOM timer was not already
scheduled, this will behave as before, whereas if it was already
scheduled, this patch will push back its firing time a bit, which is
safe because we've (unsuccessfully) attempted to refill the receive
ring just before we do this.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
When a receive interrupt occurs, mv643xx_eth would first process the
receive descriptors and then ACK the receive interrupt, instead of the
other way round.
This would leave a small race window between processing the last
receive descriptor and clearing the receive interrupt status in which
a new packet could come in, which would then 'rot' in the receive
ring until the next receive interrupt would come in.
Fix this by ACKing (clearing) the receive interrupt condition before
processing the receive descriptors.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Although mv643xx_eth has no hardware support for inserting a vlan
tag by twiddling some bits in the TX descriptor, it does support
hardware TX checksumming on packets where the IP header starts {a
limited set of values other than 14} bytes into the packet.
This patch sets mv643xx_eth's ->vlan_features to NETIF_F_SG |
NETIF_F_IP_CSUM, which prevents the stack from checksumming vlan'ed
packets in software, and if vlan tags are present on a transmitted
packet, notifies the hardware of this fact by toggling the right
bits in the TX descriptor.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
When there is a link status change (link or phy status interrupt),
print a message notifying the user of the new link status.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The mv643xx_eth hardware has a provision for polling the PHY's
MII management registers to obtain the (R)(G)MII interface speed
(10/100/1000) and duplex (half/full) and pause (off/symmetric)
settings to use to talk to the PHY.
The driver currently does not make use of this feature. Instead,
whenever there is a link status change event, it reads the current
link parameters from the PHY, and programs those parameters into
the mv643xx_eth MAC by hand.
This patch switches the mv643xx_eth driver to letting the MAC
auto-determine the (R)(G)MII link parameters by PHY polling, if there
is a PHY present. For PHYless ports (when e.g. the (R)(G)MII
interface is connected to a hardware switch), we keep hardcoding the
MII interface parameters.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Instead of hardcoding MII register addresses and values, use the
symbolic constants defined in linux/mii.h.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The mv643xx_eth driver is limiting DMA bursts to 32 bytes, while
using the largest burst size (128 bytes) gives a couple percentage
points performance improvement in throughput tests, and the docs
say that the 128 byte default should not need to be changed, so
use 128 byte bursts instead.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The recommended sequence for waiting for the transmit path to clear
after disabling all of the transmit queues is to wait for the
TX_FIFO_EMPTY bit in the Port Status register to become set as well
as the TX_IN_PROGRESS bit to clear.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The maximum receive packet size field in the Port Serial Control
register controls at what size received packets are flagged
overlength in the receive descriptor, but it doesn't prevent
overlength packets from being DMAd to memory and signaled to the
host like other received packets.
mv643xx_eth does not support receiving jumbo frames in 10/100 mode,
but setting the packet threshold to larger than 1522 bytes in 10/100
mode won't cause breakage by itself.
If we really want to enforce maximum packet size on the receiving
end instead of on the sending end where it should be done, we can
always just add a length check to the software receive handler
instead of relying on the hardware to do the comparison for us.
What's more, changing the maximum packet size field requires
temporarily disabling the RX/TX paths. So once the link comes
up in 10/100 Mb/s mode or 1000 Mb/s mode, we'd have to disable it
again just to set the right maximum packet size field (1522 in
10/100 Mb/s mode or 9700 in 1000 Mb/s mode), just so that we can
offload one comparison operation to hardware that we might as well
do in software, assuming that we'd want to do it at all.
Contrary to what the documentation suggests, there is no harm in
just setting a 9700 byte maximum packet size in 10/100 mode, so use
the maximum maximum packet size for all modes.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The mv643xx_eth driver allows doing transmit reclaim from within the
napi poll routine, but after doing reclaim, it would forget to check
the free transmit descriptor count and wake up the transmit queue if
the reclaim caused enough descriptors for a new packet to become
available. This would cause the netdev watchdog to occasionally kick
in during certain workloads with combined receive and transmit traffic.
Fix this by adding a wakeup check identical to the one in the
interrupt handler to the napi poll routine.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
When the ethernet link goes down while mv643xx_eth is transmitting
data, transmit DMA can stop before all queued transmit descriptors
have been processed. But even the descriptors that _have_ been
processed might not be properly marked as done before the transmit
DMA unit shuts down.
Then when the link comes up again, the hardware transmit pointer
might have advanced while not all previous packet descriptors have
been marked as transmitted, causing software transmit reclaim to
hang waiting for the hardware to finish transmitting a descriptor
that it has already skipped.
This patch forcibly reclaims all packets on the transmit ring on a
link down interrupt, and then resyncs the hardware transmit pointer to
what the software's idea of the first free descriptor is. Also, we
need to prevent re-waking the transmit queue if we get a 'transmit
done' interrupt at the same time as a 'link down' interrupt, which
this patch does as well.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The previously merged TX hang erratum workaround ("mv643xx_eth:
work around TX hang hardware issue") assumes that TX_END interrupts
are delivered simultaneously with or after their corresponding TX
interrupts, but this is not always true in practise.
In particular, it appears that TX_END interrupts are issued as soon
as descriptor fetch returns an invalid descriptor, which may happen
before earlier descriptors have been fully transmitted and written
back to memory as being done.
This hardware behavior can lead to a situation where the current
driver code mistakenly assumes that the MAC has given up transmitting
before noticing the packets that it is in fact still currently working
on, causing the driver to re-kick the transmit queue, which will only
cause the MAC to re-fetch the invalid head descriptor, and generate
another TX_END interrupt, et cetera, until the packets in the pipe
finally finish transmitting and have their descriptors written back
to memory, which will then finally break the loop.
Fix this by having the erratum workaround not check the 'number of
unfinished descriptor', but instead, to compare the software's idea
of what the head descriptor pointer should be to the hardware's head
descriptor pointer (which is updated on the same conditions as the
TX_END interupt is generated on, i.e. possibly before all previous
descriptors have been transmitted and written back).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Joseph Fannin <jfannin@gmail.com> and Takashi Iwai <tiwai@suse.de>
noticed that commit 073a345c04
("mv643xx_eth: clarify irq masking and unmasking") broke the
mv643xx_eth build when NETPOLL is enabled, due to it not renaming
one instance of INT_CAUSE_EXT in mv643xx_eth_netpoll(). This patch
takes care of that instance as well.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Cc: Dale Farnsworth <dale@farnsworth.org>
Cc: Joseph Fannin <jfannin@gmail.com>
Cc: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
On some boards, the mv643xx_eth MAC isn't connected to a PHY but
directly (via the MII/GMII/RGMII interface) to another MAC-layer
device. This patch allows specifying ->phy_addr = -1 to skip all
PHY-related initialisation and run-time poking in that case.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
During OOM, instead of stopping RX refill when the rx desc ring is
not empty, keep trying to refill the ring as long as it is not full
instead.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Some SoCs have the TX bandwidth control registers in a slightly
different place. This patch detects that case at run time, and
re-directs accesses to those registers to the proper place at
run time if needed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Newer hardware has a 16-bit instead of a 14-bit RX coalescing
count field in the SDMA_CONFIG register. This patch adds a run-time
check for which of the two we have, and adjusts further writes to the
rx coal count field accordingly.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Under some conditions, the TXQ ('TX queue being served') bit can clear
before all packets queued for that TX queue have been transmitted.
This patch enables TXend interrupts, and uses those to re-kick TX
queues that claim to be idle but still have queued descriptors from
the interrupt handler.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
As with the multiple RX queue support, allow the platform code to
specify that the hardware we are running on supports multiple TX
queues. This patch only uses the highest-numbered enabled queue
to send packets to for now, this can be extended later to enable
QoS and such.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Allow the platform code to specify that we are running on hardware
that is capable of supporting multiple RX queues. If this option
is used, initialise all of the given RX queues instead of just RX
queue zero.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Add an interface for the hardware's per-port and per-subqueue
TX rate control. In this stage, this is mainly so that we can
disable the bandwidth limits during initialisation of the port.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
General cleanup of the mv643xx_eth driver. Mainly fixes coding
style / indentation issues, get rid of some useless 'volatile's,
kill some more superfluous comments, and such.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Remove the write-only ->[rt]x_int_coal members from struct
mv643xx_eth_private. In the process, tweak the RX/TX interrupt
mitigation code so that it is compiled by default, and set the
default coalescing delays to 0 usec.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Split all TX queue related state into 'struct tx_queue', in
preparation for multiple TX queue support.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Split all RX queue related state into 'struct rx_queue', in
preparation for multiple RX queue support.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The per-port mv643xx_eth_private struct had a private instance
of struct net_device_stats that was never ever written to, only
read (via the ethtool statistics interface). This patch gets
rid of the private instance, and tweaks the ethtool statistics
code in mv643xx_eth to use the statistics in struct net_device
instead.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Since they are no longer used, kill enum FUNC_RET_STATUS and
struct pkt_info (which were a rather roundabout way of communicating
RX/TX status within the same driver).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
rx_return_buff() is also a remnant of the HAL layering that the
original mv643xx_eth driver used. Moving it into its caller kills
the last reference to FUNC_RET_STATUS/pkt_info.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The port_receive() function is a remnant of the original mv643xx_eth
HAL split. This patch moves port_receive() into its caller, so that
the top and the bottom half of RX processing no longer communicate
via the HAL FUNC_RET_STATUS/pkt_info mechanism abstraction anymore.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Half of the functions in the mv643xx_eth driver are prefixed by
useless and baroque comment blocks on _what_ those functions do (which
is obvious from the code itself) rather than why, and there's no point
in keeping those comments around.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
A bunch of places in the mv643xx_eth driver use the 'mv643xx_'
prefix. Since the mv643xx is a chip that includes more than just
ethernet, this patch makes all those places use either no prefix
(for some internal-use-only functions), or the full 'mv643xx_eth_'
prefix.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The fact that mv643xx_eth is an ethernet driver is pretty obvious,
and having a lot of internal-use-only functions and defines prefixed
with ETH_/ethernet_/eth_ prefixes is rather pointless. So, get rid
of most of those prefixes.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Remove the unused rx/tx descriptor field defines, and move the ones
that are actually used to the actual definitions of the rx/tx
descriptor format.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
All except one of the port serial status register bit defines are
unused -- kill the unused ones.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The only user of the ETH_MIB_VERY_LONG_NAME_HERE defines is the
eth_update_mib_counters() function. Get rid of the defines by
open-coding the register offsets in the latter.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Get rid of RX_BUF_OFFSET (which is synonymous with ETH_HW_IP_ALIGN).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Replace the nondescriptive names ETH_INT_UNMASK_ALL and
ETH_INT_UNMASK_ALL_EXT by names of the actual fields being masked
and unmasked in the various writes to the interrupt mask registers.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
None of the port status register bit defines are ever used in the
mv643xx_eth driver -- nuke them all.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Over half of the port serial control register bit defines are never
used, and the PORT_SERIAL_CONTROL_DEFAULT_VALUE define is never used
either. Keep only those defines that are actually used.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Delete the defines for SDMA config register bit values that are
never used in the driver, to tidy up the code some more.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The port config extend register is never changed at run time.
Document the meaning of the initial value, and delete the defines
for the individual bits in this register.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
The mv643xx_eth driver only ever changes bit 0 of the port config
register at run time, the rest of the register bits are fixed (and
always zero). Document the meaning of the chosen default value,
and get rid of all the defines for each of the individual bits.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Shorten the various oversized register names in mv643xx_eth.c, to
increase readability.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
This patch performs a reverse topological sort of all functions in
mv643xx_eth.c, so that we can get rid of all forward declarations,
and end up with a more understandable driver due to related functions
being grouped together.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
There exist chips with up to four mv643xx_eth silicon blocks but
only one external SMI (MII management) interface -- the SMI logic
of the first block is shared by all the blocks.
Handle this by allowing a per-port override of which
mv643xx_eth_shared's SMI registers (and spinlock) to use.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Make t_clk configurable via platform device data (with the current
hardcoded value, 133 MHz, being the default), as it varies across
different chip families.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Make it possible to pass mbus_dram_target_info to the mv643xx_eth
driver via the platform data, and make the mv643xx_eth driver
program the window registers based on this data if it is passed in.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Move mv643xx_eth's static state (ethernet register block base address
and MII management interface spinlock) into a struct hanging off the
shared platform device. This is necessary to support chips that
contain multiple mv643xx_eth silicon blocks.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Since 43cc71eed1, the platform modalias is
prefixed with "platform:". Add MODULE_ALIAS() to the hotpluggable network
platform drivers, to re-enable auto loading.
NOTE: didn't change drivers/net/fs_enet/fs_enet-main.c "old binding" support.
That looks problematic in the first place (it even uses the ancient "struct
device_driver" binding scheme for platform_bus!) and I suspect it will vanish
soonish when arch/powerpc rules the world. Also, drivers/net/ne.c would have
needed more thought to sort out.
[akpm@linux-foundation.org: fix sgiseeq.c]
[dbrownell@users.sourceforge.net: more drivers, registration fixes]
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Vitaly Bordug <vitb@kernel.crashing.org>
Cc: Dale Farnsworth <dale@farnsworth.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Andrew Victor <andrew@sanpeople.com>
Cc: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
When there are multiple mv643xx_eth silicon blocks in the system,
don't print an initialisation message for each and every one of
them.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Pass a struct mv643xx_private * to the register accessor functions,
as a preparation for having multiple mv643xx_eth silicon blocks.
(Since this causes some 80 column straddling, and the mv_ prefix
is useless anyway, rename mv_read to rdl and mv_write to wrl to
compensate.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
In error and warning printks, always report the netdevice name
instead of the port index (the latter has no meaning when there
are multiple mv643xx_eth silicon blocks in the system.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Instead of identifying individual mv643xx ethernet ports by only
their port number, identify them by their struct mv643xx_private *,
as just a port number has no meaning when there are multiple
mv643xx_eth silicon blocks in the system.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
- Remove unused MV643XX_DEFAULT_[RT]X_QUEUE_SIZE definitions.
- Remove ETH_TARGET enum -- it isn't used anywhere in the driver,
and isn't even valid for non-mv643xx chip models, as those use
different MBUS target IDs.
- Clean up comment and control flow in mv643xx_eth_change_mtu().
- Use mp->dev instead of mp->mii.dev in mv643xx_eth_tx_timeout_task().
- Make mv643xx_eth_free_tx_descs() static.
- Remove overzealous NULL check in mv643xx_eth_start_xmit().
- Use symbolic NETDEV_TX_* constants in mv643xx_eth_start_xmit().
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Robert P.J. Day proposed to use the macro FIELD_SIZEOF in replace of code
that matches its definition.
The modification was made using the following semantic patch
(http://www.emn.fr/x-info/coccinelle/)
// <smpl>
@haskernel@
@@
#include <linux/kernel.h>
@depends on haskernel@
type t;
identifier f;
@@
- (sizeof(((t*)0)->f))
+ FIELD_SIZEOF(t, f)
@depends on haskernel@
type t;
identifier f;
@@
- sizeof(((t*)0)->f)
+ FIELD_SIZEOF(t, f)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The mv643xx_eth driver can be loaded as a platform device, as is done by
various Orion (ARM) based devices. The driver needs to define a module
alias for the platform driver so udev will load it automatically.
Tested with Debian on a QNAP TS-209.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The Marvell Orion system on chips have an integrated mv643xx MAC. On these
little endian ARM devices mv643xx will oops when checksum offload is
enabled. Swapping the byte order of the protocol and checksum solves this
problem.
Signed-off-by: Byron Bradley <byron.bbradley@gmail.com>
Cc: Dale Farnsworth <dale@farnsworth.org>
Cc: Manish Lachwani <mlachwani@mvista.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Commit b9f2c044 replaced mv643xx_get_stats_count() with
mv643xx_get_sset_count(), but forgot to hook it up.
drivers/net/mv643xx_eth.c:2678: warning: mv643xx_get_sset_count defined but not used
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Since drivers/net/mv643xx_eth.c is the only user of
drivers/net/mv643xx_eth.h, there's not much use in having the header
file as a separate file, so merge the header into the driver.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Now that all register address and bit defines are in private
namespace (drivers/net/mv643xx_eth.h), we can safely remove the
MV643XX_ETH_ prefix to conserve horizontal space.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
