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11282a49b7
The Allwinner reset controller has 32-bit registers, so translating the reset cell number into a register and bit offset should not use any architecture dependent data size. Otherwise this breaks for 64-bit architectures like arm64. Fix this by making it clear that it's the hardware register width which matters here in the calculation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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.. | ||
hisilicon | ||
sti | ||
tegra | ||
core.c | ||
Kconfig | ||
Makefile | ||
reset-a10sr.c | ||
reset-ath79.c | ||
reset-berlin.c | ||
reset-imx7.c | ||
reset-lpc18xx.c | ||
reset-meson.c | ||
reset-oxnas.c | ||
reset-pistachio.c | ||
reset-socfpga.c | ||
reset-stm32.c | ||
reset-sunxi.c | ||
reset-ti-syscon.c | ||
reset-uniphier.c | ||
reset-zx2967.c | ||
reset-zynq.c |