Dmitry Eremin-Solenikov 83508093f4 ARM: 8278/1: sa1100: split irq handling for low GPIOs ... Low GPIO pins use an interrupt in SC interrupts space. However it's possible to handle them as if all the GPIO interrupts are instead tied to single GPIO handler, which later decodes GEDR register and chain-calls next IRQ handler. So split first 11 interrupts into system part (IRQ_GPIO0_SC - IRQ_GPIO10_SC) which work exactly like the rest of system controller interrupts and real GPIO interrupts (IRQ_GPIO0..IRQ_GPIO10). A single handler sa1100_gpio_handler then decodes and calls next handler. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2015-01-29 15:24:46 +00:00
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include/mach	ARM: 8278/1: sa1100: split irq handling for low GPIOs	2015-01-29 15:24:46 +00:00
assabet.c	ARM: 8025/1: Get rid of meminfo	2014-06-01 01:17:12 +01:00
badge4.c
cerf.c
clock.c	ARM: 8250/1: sa1100: provide OSTIMER0 clock for pxa_timer	2015-01-14 11:28:22 +00:00
collie.c	ARM: 8217/1: sa1100 collie: use gpio-charger instead of pda-power	2014-11-27 16:15:32 +00:00
generic.c	ARM: 8252/1: sa1100: use pxa_timer clocksource driver	2015-01-14 11:28:37 +00:00
generic.h
h3xxx.c	ARM: 8136/1: sa1100: add Micro ASIC platform device	2014-09-12 17:39:50 +01:00
h3100.c
h3600.c
hackkit.c
irq.c	ARM: 8278/1: sa1100: split irq handling for low GPIOs	2015-01-29 15:24:46 +00:00
jornada720_ssp.c
jornada720.c
Kconfig	ARM: 8136/1: sa1100: add Micro ASIC platform device	2014-09-12 17:39:50 +01:00
lart.c
Makefile	ARM: 8252/1: sa1100: use pxa_timer clocksource driver	2015-01-14 11:28:37 +00:00
Makefile.boot
nanoengine.c
neponset.c	ARM: mach-sa1100: drop owner assignment from platform_drivers	2014-10-20 16:20:06 +02:00
pci-nanoengine.c	ARM: sa11x0: Use void __iomem * in MMIO accessors	2014-11-11 19:28:24 +01:00
pleb.c
pm.c
shannon.c
simpad.c
sleep.S
ssp.c