Cliff Brake b6018958a5 pxamci: enable DMA for write ops after CMD/RESP ... With the PXA270 MMC hardware, there seems to be an issue of data corruption on writes where a 4KB data block is offset by one byte. If we delay enabling the DMA for writes until after the CMD/RESP has finished, the problem seems to be fixed. related to PXA270 Erratum #91 Tested-by: Vernon Sauder <VernonInHand@gmail.com> Signed-off-by: Cliff Brake <cbrake@bec-systems.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>		2009-02-02 20:57:07 +01:00
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host	pxamci: enable DMA for write ops after CMD/RESP	2009-02-02 20:57:07 +01:00
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