Matthew Gerlach dd17cc7bf8 fpga fr br: update supported version numbers ... The value in the version register of the altera freeze bridge controller changed from the beta value of 2 to the value of 0xad000003 in the official release of the IP. This patch supports the old and new version numbers, and the driver's probe function will fail if neither of the supported versions is found. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-04-26 11:38:56 +02:00
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altera-fpga2sdram.c
altera-freeze-bridge.c	fpga fr br: update supported version numbers	2017-04-26 11:38:56 +02:00
altera-hps2fpga.c	fpga altera-hps2fpga: disable/unprepare clock on error in alt_fpga_bridge_probe()	2017-04-26 11:38:56 +02:00
altera-pr-ip-core-plat.c	fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.	2017-04-08 17:45:28 +02:00
altera-pr-ip-core.c	fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.	2017-04-08 17:45:28 +02:00
fpga-bridge.c
fpga-mgr.c
fpga-region.c	fpga: region: release FPGA region reference in error path	2017-04-26 11:38:56 +02:00
ice40-spi.c
Kconfig	fpga: Add support for Xilinx LogiCORE PR Decoupler	2017-04-08 17:50:36 +02:00
Makefile	fpga: Add support for Xilinx LogiCORE PR Decoupler	2017-04-08 17:50:36 +02:00
socfpga-a10.c
socfpga.c
ts73xx-fpga.c
xilinx-pr-decoupler.c	fpga: Add support for Xilinx LogiCORE PR Decoupler	2017-04-08 17:50:36 +02:00
xilinx-spi.c	fpga manager: Add Xilinx slave serial SPI driver	2017-04-08 17:45:28 +02:00
zynq-fpga.c