AArch32 and AArch64 Runtime Code Generation Library
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Alexandre Rames 0d68001a97 AArch64: update the behaviour of breakpoint in the debugger.
When hitting a breakpoint, the debugger now stops with the PC pointing *after*
the breakpoint.

Before:

  vixl> disasm 6
  0x0000000002271c58  d2800021        mov x1, #0x1
  0x0000000002271c5c  d2800042        mov x2, #0x2
  0x0000000002271c60  d2800063        mov x3, #0x3
  0x0000000002271c64  d2800084        mov x4, #0x4
  0x0000000002271c68  d4200020        brk #0x1
  0x0000000002271c6c  d28000a5        mov x5, #0x5
  vixl> c
  Hit breakpoint at pc=0x2271c68.
  Next: 0x0000000002271c68  d4200020  brk #0x1
  vixl>

After:

  vixl> disasm 6
  0x000000000118dc58  d2800021        mov x1, #0x1
  0x000000000118dc5c  d2800042        mov x2, #0x2
  0x000000000118dc60  d2800063        mov x3, #0x3
  0x000000000118dc64  d2800084        mov x4, #0x4
  0x000000000118dc68  d4200020        brk #0x1
  0x000000000118dc6c  d28000a5        mov x5, #0x5
  vixl> c
  Hit breakpoint at pc=0x118dc68.
  Next: 0x000000000118dc6c  d28000a5  mov x5, #0x5

Change-Id: Ia14e030cd1fa4ab73e49ec0782c91c04fc4fcc5e
2016-07-21 14:15:49 +00:00
benchmarks/aarch64 Update naming to aarch32 and aarch64. 2016-07-04 15:03:43 +01:00
doc Aarch64: Clean a few more usage of the MacroAssembler constructor. 2016-07-11 17:11:03 +01:00
examples Aarch64: Clean a few more usage of the MacroAssembler constructor. 2016-07-11 17:11:03 +01:00
src AArch64: update the behaviour of breakpoint in the debugger. 2016-07-21 14:15:49 +00:00
test Aarch64: Rename allow_simulator_instructions_ to generate_simulator_code_. 2016-07-12 15:26:02 +00:00
third_party/android Update naming to aarch32 and aarch64. 2016-07-04 15:03:43 +01:00
tools Print relative real paths when running tests. 2016-07-20 10:39:38 +01:00
.clang-format Add an AUTHORS file and update copyright notices. 2016-07-04 08:44:15 +01:00
.gitignore Cache tools/lint.py results. 2016-07-12 14:52:20 +00:00
.gitreview Add a .gitreview for Linaro's server. 2016-05-13 16:14:28 +01:00
.ycm_extra_conf.py Fix the YCM configuration for the simulator. 2016-07-01 14:00:44 +01:00
AUTHORS Add an AUTHORS file and update copyright notices. 2016-07-04 08:44:15 +01:00
CPPLINT.cfg VIXL Release 1.13 2016-05-13 15:06:20 +01:00
LICENCE Add an AUTHORS file and update copyright notices. 2016-07-04 08:44:15 +01:00
README.md VIXL Release 1.13 2016-05-13 15:06:20 +01:00
SConstruct Update naming to aarch32 and aarch64. 2016-07-04 15:03:43 +01:00

VIXL: AArch64 Runtime Code Generation Library Version 1.13

Contents:

  • Overview
  • Licence
  • Requirements
  • Known limitations
  • Usage

Overview

VIXL contains three components.

  1. A programmatic assembler to generate A64 code at runtime. The assembler abstracts some of the constraints of the A64 ISA; for example, most instructions support any immediate.
  2. A disassembler that can print any instruction emitted by the assembler.
  3. A simulator that can simulate any instruction emitted by the assembler. The simulator allows generated code to be run on another architecture without the need for a full ISA model.

The VIXL git repository can be found on GitHub.

Changes from previous versions of VIXL can be found in the Changelog.

Licence

This software is covered by the licence described in the LICENCE file.

Requirements

To build VIXL the following software is required:

  1. Python 2.7
  2. SCons 2.0
  3. GCC 4.8+ or Clang 3.4+

A 64-bit host machine is required, implementing an LP64 data model. VIXL has been tested using GCC on AArch64 Debian, GCC and Clang on amd64 Ubuntu systems.

To run the linter and code formatting stages of the tests, the following software is also required:

  1. Git
  2. Google's cpplint.py
  3. clang-format-3.6

Refer to the 'Usage' section for details.

Known Limitations

VIXL was developed for JavaScript engines so a number of features from A64 were deemed unnecessary:

  • Limited rounding mode support for floating point.
  • Limited support for synchronisation instructions.
  • Limited support for system instructions.
  • A few miscellaneous integer and floating point instructions are missing.

The VIXL simulator supports only those instructions that the VIXL assembler can generate. The doc directory contains a list of supported instructions.

The VIXL simulator was developed to run on 64-bit amd64 platforms. Whilst it builds and mostly works for 32-bit x86 platforms, there are a number of floating-point operations which do not work correctly, and a number of tests fail as a result.

VIXL may not build using Clang 3.7, due to a compiler warning. A workaround is to disable conversion of warnings to errors, or to delete the offending return statement reported and rebuild. This problem will be fixed in the next release.

Debug Builds

Your project's build system must define VIXL_DEBUG (eg. -DVIXL_DEBUG) when using a VIXL library that has been built with debug enabled.

Some classes defined in VIXL header files contain fields that are only present in debug builds, so if VIXL_DEBUG is defined when the library is built, but not defined for the header files included in your project, you will see runtime failures.

Exclusive-Access Instructions

All exclusive-access instructions are supported, but the simulator cannot accurately simulate their behaviour as described in the ARMv8 Architecture Reference Manual.

  • A local monitor is simulated, so simulated exclusive loads and stores execute as expected in a single-threaded environment.
  • The global monitor is simulated by occasionally causing exclusive-access instructions to fail regardless of the local monitor state.
  • Load-acquire, store-release semantics are approximated by issuing a host memory barrier after loads or before stores. The built-in __sync_synchronize() is used for this purpose.

The simulator tries to be strict, and implements the following restrictions that the ARMv8 ARM allows:

  • A pair of load-/store-exclusive instructions will only succeed if they have the same address and access size.
  • Most of the time, cache-maintenance operations or explicit memory accesses will clear the exclusive monitor.
    • To ensure that simulated code does not depend on this behaviour, the exclusive monitor will sometimes be left intact after these instructions.

Instructions affected by these limitations: stxrb, stxrh, stxr, ldxrb, ldxrh, ldxr, stxp, ldxp, stlxrb, stlxrh, stlxr, ldaxrb, ldaxrh, ldaxr, stlxp, ldaxp, stlrb, stlrh, stlr, ldarb, ldarh, ldar, clrex.

Usage

Running all Tests

The helper script tools/test.py will build and run every test that is provided with VIXL, in both release and debug mode. It is a useful script for verifying that all of VIXL's dependencies are in place and that VIXL is working as it should.

By default, the tools/test.py script runs a linter to check that the source code conforms with the code style guide, and to detect several common errors that the compiler may not warn about. This is most useful for VIXL developers. The linter has the following dependencies:

  1. Git must be installed, and the VIXL project must be in a valid Git repository, such as one produced using git clone.
  2. cpplint.py, as provided by Google, must be available (and executable) on the PATH.

It is possible to tell tools/test.py to skip the linter stage by passing --nolint. This removes the dependency on cpplint.py and Git. The --nolint option is implied if the VIXL project is a snapshot (with no .git directory).

Additionally, tools/test.py tests code formatting using clang-format-3.6. If you don't have clang-format-3.6, disable the test using the --noclang-format option.

Also note that the tests for the tracing features depend upon external diff and sed tools. If these tools are not available in PATH, these tests will fail.

Getting Started

A short introduction to using VIXL can be found here. Example source code is provided in the examples directory. You can build all the examples with scons examples from the root directory, or use scons --help to get a detailed list of available build targets.

Using VIXL

In addition to getting started and the examples, you can find documentation and guides on various topics that may be helpful here.