core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips

This commit is contained in:
Nguyen Anh Quynh 2015-03-09 21:36:02 +08:00
parent bf97e21bb5
commit 037e01f942
4 changed files with 0 additions and 52 deletions

View File

@ -477,23 +477,6 @@ enum {
Mips_ACC128RegClassID = 61,
};
// Subregister indices
enum {
Mips_NoSubRegister,
Mips_sub_32, // 1
Mips_sub_64, // 2
Mips_sub_dsp16_19, // 3
Mips_sub_dsp20, // 4
Mips_sub_dsp21, // 5
Mips_sub_dsp22, // 6
Mips_sub_dsp23, // 7
Mips_sub_hi, // 8
Mips_sub_lo, // 9
Mips_sub_hi_then_sub_32, // 10
Mips_sub_32_sub_hi_then_sub_32, // 11
Mips_NUM_TARGET_SUBREGS
};
#endif // GET_REGINFO_ENUM
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\

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@ -354,18 +354,6 @@ enum {
PPC_QFRCRegClassID = 22,
};
// Subregister indices
enum {
PPC_NoSubRegister,
PPC_sub_32, // 1
PPC_sub_64, // 2
PPC_sub_128, // 3
PPC_sub_eq, // 4
PPC_sub_gt, // 5
PPC_sub_lt, // 6
PPC_sub_un, // 7
PPC_NUM_TARGET_SUBREGS
};
#endif // GET_REGINFO_ENUM
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\

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@ -148,17 +148,6 @@ enum {
SP_QFPRegs_with_sub_evenRegClassID = 7
};
// Subregister indices
enum {
SP_NoSubRegister,
SP_sub_even, // 1
SP_sub_even64, // 2
SP_sub_odd, // 3
SP_sub_odd64, // 4
SP_sub_odd64_then_sub_even, // 5
SP_sub_odd64_then_sub_odd, // 6
SP_NUM_TARGET_SUBREGS
};
#endif // GET_REGINFO_ENUM
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\

View File

@ -131,18 +131,6 @@ enum {
SystemZ_ADDR128BitRegClassID = 11
};
// Subregister indices
enum {
SystemZ_NoSubRegister,
SystemZ_subreg_h32, // 1
SystemZ_subreg_h64, // 2
SystemZ_subreg_hh32, // 3
SystemZ_subreg_hl32, // 4
SystemZ_subreg_l32, // 5
SystemZ_subreg_l64, // 6
SystemZ_NUM_TARGET_SUBREGS
};
#endif // GET_REGINFO_ENUM
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\