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core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips
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@ -477,23 +477,6 @@ enum {
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Mips_ACC128RegClassID = 61,
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};
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// Subregister indices
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enum {
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Mips_NoSubRegister,
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Mips_sub_32, // 1
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Mips_sub_64, // 2
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Mips_sub_dsp16_19, // 3
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Mips_sub_dsp20, // 4
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Mips_sub_dsp21, // 5
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Mips_sub_dsp22, // 6
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Mips_sub_dsp23, // 7
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Mips_sub_hi, // 8
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Mips_sub_lo, // 9
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Mips_sub_hi_then_sub_32, // 10
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Mips_sub_32_sub_hi_then_sub_32, // 11
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Mips_NUM_TARGET_SUBREGS
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};
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#endif // GET_REGINFO_ENUM
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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@ -354,18 +354,6 @@ enum {
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PPC_QFRCRegClassID = 22,
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};
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// Subregister indices
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enum {
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PPC_NoSubRegister,
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PPC_sub_32, // 1
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PPC_sub_64, // 2
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PPC_sub_128, // 3
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PPC_sub_eq, // 4
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PPC_sub_gt, // 5
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PPC_sub_lt, // 6
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PPC_sub_un, // 7
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PPC_NUM_TARGET_SUBREGS
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};
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#endif // GET_REGINFO_ENUM
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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@ -148,17 +148,6 @@ enum {
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SP_QFPRegs_with_sub_evenRegClassID = 7
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};
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// Subregister indices
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enum {
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SP_NoSubRegister,
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SP_sub_even, // 1
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SP_sub_even64, // 2
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SP_sub_odd, // 3
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SP_sub_odd64, // 4
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SP_sub_odd64_then_sub_even, // 5
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SP_sub_odd64_then_sub_odd, // 6
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SP_NUM_TARGET_SUBREGS
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};
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#endif // GET_REGINFO_ENUM
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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@ -131,18 +131,6 @@ enum {
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SystemZ_ADDR128BitRegClassID = 11
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};
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// Subregister indices
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enum {
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SystemZ_NoSubRegister,
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SystemZ_subreg_h32, // 1
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SystemZ_subreg_h64, // 2
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SystemZ_subreg_hh32, // 3
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SystemZ_subreg_hl32, // 4
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SystemZ_subreg_l32, // 5
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SystemZ_subreg_l64, // 6
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SystemZ_NUM_TARGET_SUBREGS
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};
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#endif // GET_REGINFO_ENUM
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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