mirror of
https://github.com/capstone-engine/capstone.git
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refactor: Refactor TriCore instructions and operands
- Add new immediate operands and refactor code for better readability in TriCoreInstrInfo - Update InstPrinter functions to handle new immediate operands and remove unused function
This commit is contained in:
billow
parent
5b7e20ad55
commit
fae62b74bf
@ -825,18 +825,18 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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806360848U, // IXMIN_U_rrr
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806360251U, // IXMIN_rrr
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16714U, // JA_b
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4336U, // JEQ_A_brr
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1342181616U, // JEQ_A_brr
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7361896U, // JEQ_brc
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5480U, // JEQ_brr
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1342182760U, // JEQ_brr
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24621U, // JEQ_sbc1
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24621U, // JEQ_sbc2
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8392749U, // JEQ_sbr1
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8392749U, // JEQ_sbr2
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8394918U, // JGEZ_sbr
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7362306U, // JGE_U_brc
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5890U, // JGE_U_brr
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1342183170U, // JGE_U_brr
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7361059U, // JGE_brc
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4643U, // JGE_brr
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1342181923U, // JGE_brr
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8394951U, // JGTZ_sbr
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152662U, // JI_rr
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136278U, // JI_sr
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@ -845,31 +845,31 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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152666U, // JLI_rr
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8394957U, // JLTZ_sbr
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7362412U, // JLT_U_brc
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5996U, // JLT_U_brr
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1342183276U, // JLT_U_brr
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7362244U, // JLT_brc
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5828U, // JLT_brr
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1342183108U, // JLT_brr
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17551U, // JL_b
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7361024U, // JNED_brc
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4608U, // JNED_brr
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1342181888U, // JNED_brr
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7361616U, // JNEI_brc
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5200U, // JNEI_brr
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4312U, // JNE_A_brr
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1342182480U, // JNEI_brr
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1342181592U, // JNE_A_brr
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7361106U, // JNE_brc
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4690U, // JNE_brr
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1342181970U, // JNE_brr
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24610U, // JNE_sbc1
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24610U, // JNE_sbc2
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8392738U, // JNE_sbr1
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8392738U, // JNE_sbr2
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4375U, // JNZ_A_brr
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1342181655U, // JNZ_A_brr
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8392983U, // JNZ_A_sbr
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5772U, // JNZ_T_brn
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16781390U, // JNZ_T_sbrn
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1342183052U, // JNZ_T_brn
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8392782U, // JNZ_T_sbrn
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30914U, // JNZ_sb
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8394946U, // JNZ_sbr
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4369U, // JZ_A_brr
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1342181649U, // JZ_A_brr
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8392977U, // JZ_A_sbr
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5766U, // JZ_T_brn
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16781378U, // JZ_T_sbrn
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1342183046U, // JZ_T_brn
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8392770U, // JZ_T_sbrn
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30905U, // JZ_sb
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8394937U, // JZ_sbr
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17521U, // J_b
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@ -885,89 +885,89 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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166017U, // LDUCX_abs
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3349269U, // LDUCX_bo_bso
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9441484U, // LD_A_abs
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1392971980U, // LD_A_bo_bso
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1661407436U, // LD_A_bo_bso
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67571916U, // LD_A_bo_c
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1426526412U, // LD_A_bo_pos
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1393037516U, // LD_A_bo_pre
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1694961868U, // LD_A_bo_pos
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1661472972U, // LD_A_bo_pre
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101126348U, // LD_A_bo_r
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50794700U, // LD_A_bol
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139376U, // LD_A_sc
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1661407436U, // LD_A_slr
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1694961868U, // LD_A_slr_post
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1929842892U, // LD_A_slr
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1963397324U, // LD_A_slr_post
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594124U, // LD_A_slro
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27466292U, // LD_A_sro
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9443210U, // LD_BU_abs
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1392973706U, // LD_BU_bo_bso
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1661409162U, // LD_BU_bo_bso
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67573642U, // LD_BU_bo_c
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1426528138U, // LD_BU_bo_pos
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1393039242U, // LD_BU_bo_pre
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1694963594U, // LD_BU_bo_pos
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1661474698U, // LD_BU_bo_pre
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101128074U, // LD_BU_bo_r
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50796426U, // LD_BU_bol
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1661409162U, // LD_BU_slr
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1694963594U, // LD_BU_slr_post
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1929844618U, // LD_BU_slr
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1963399050U, // LD_BU_slr_post
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595850U, // LD_BU_slro
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27466318U, // LD_BU_sro
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9441650U, // LD_B_abs
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1392972146U, // LD_B_bo_bso
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1661407602U, // LD_B_bo_bso
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67572082U, // LD_B_bo_c
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1426526578U, // LD_B_bo_pos
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1393037682U, // LD_B_bo_pre
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1694962034U, // LD_B_bo_pos
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1661473138U, // LD_B_bo_pre
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101126514U, // LD_B_bo_r
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50794866U, // LD_B_bol
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9441581U, // LD_DA_abs
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1392972077U, // LD_DA_bo_bso
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1661407533U, // LD_DA_bo_bso
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67572013U, // LD_DA_bo_c
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1426526509U, // LD_DA_bo_pos
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1393037613U, // LD_DA_bo_pre
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1694961965U, // LD_DA_bo_pos
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1661473069U, // LD_DA_bo_pre
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101126445U, // LD_DA_bo_r
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9441761U, // LD_D_abs
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1392972257U, // LD_D_bo_bso
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1661407713U, // LD_D_bo_bso
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67572193U, // LD_D_bo_c
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1426526689U, // LD_D_bo_pos
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1393037793U, // LD_D_bo_pre
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1694962145U, // LD_D_bo_pos
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1661473249U, // LD_D_bo_pre
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101126625U, // LD_D_bo_r
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9443259U, // LD_HU_abs
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1392973755U, // LD_HU_bo_bso
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1661409211U, // LD_HU_bo_bso
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67573691U, // LD_HU_bo_c
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1426528187U, // LD_HU_bo_pos
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1393039291U, // LD_HU_bo_pre
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1694963643U, // LD_HU_bo_pos
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1661474747U, // LD_HU_bo_pre
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101128123U, // LD_HU_bo_r
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50796475U, // LD_HU_bol
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9441993U, // LD_H_abs
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1392972489U, // LD_H_bo_bso
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1661407945U, // LD_H_bo_bso
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67572425U, // LD_H_bo_c
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1426526921U, // LD_H_bo_pos
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1393038025U, // LD_H_bo_pre
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1694962377U, // LD_H_bo_pos
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1661473481U, // LD_H_bo_pre
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101126857U, // LD_H_bo_r
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50795209U, // LD_H_bol
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1661407945U, // LD_H_slr
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1694962377U, // LD_H_slr_post
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1929843401U, // LD_H_slr
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1963397833U, // LD_H_slr_post
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594633U, // LD_H_slro
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27466305U, // LD_H_sro
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9442558U, // LD_Q_abs
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1392973054U, // LD_Q_bo_bso
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1661408510U, // LD_Q_bo_bso
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67572990U, // LD_Q_bo_c
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1426527486U, // LD_Q_bo_pos
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1393038590U, // LD_Q_bo_pre
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1694962942U, // LD_Q_bo_pos
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1661474046U, // LD_Q_bo_pre
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101127422U, // LD_Q_bo_r
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9443367U, // LD_W_abs
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1392973863U, // LD_W_bo_bso
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1661409319U, // LD_W_bo_bso
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67573799U, // LD_W_bo_c
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1426528295U, // LD_W_bo_pos
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1393039399U, // LD_W_bo_pre
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1694963751U, // LD_W_bo_pos
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1661474855U, // LD_W_bo_pre
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101128231U, // LD_W_bo_r
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50796583U, // LD_W_bol
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139393U, // LD_W_sc
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1661409319U, // LD_W_slr
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1694963751U, // LD_W_slr_post
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1929844775U, // LD_W_slr
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1963399207U, // LD_W_slr_post
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596007U, // LD_W_slro
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27466332U, // LD_W_sro
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9441595U, // LEA_abs
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1392972091U, // LEA_bo_bso
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1661407547U, // LEA_bo_bso
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50794811U, // LEA_bol
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9441600U, // LHA_abs
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137220U, // LOOPU_brr
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16782568U, // LOOP_brr
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43012U, // LOOPU_brr
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11539688U, // LOOP_brr
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8393960U, // LOOP_sbr
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4343U, // LT_A_rr
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4519U, // LT_B
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@ -995,15 +995,15 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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4199378U, // MADDRS_H_rrr1_LU
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4199378U, // MADDRS_H_rrr1_UL
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4199378U, // MADDRS_H_rrr1_UU
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2000688449U, // MADDRS_Q_rrr1_L_L
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2017465665U, // MADDRS_Q_rrr1_U_U
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2269123905U, // MADDRS_Q_rrr1_L_L
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2285901121U, // MADDRS_Q_rrr1_U_U
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4199230U, // MADDR_H_rrr1_DcEdDaDbUL
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4199230U, // MADDR_H_rrr1_LL
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4199230U, // MADDR_H_rrr1_LU
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4199230U, // MADDR_H_rrr1_UL
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4199230U, // MADDR_H_rrr1_UU
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2000688404U, // MADDR_Q_rrr1_L_L
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2017465620U, // MADDR_Q_rrr1_U_U
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2269123860U, // MADDR_Q_rrr1_L_L
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2285901076U, // MADDR_Q_rrr1_U_U
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4199344U, // MADDSUMS_H_rrr1_LL
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4199344U, // MADDSUMS_H_rrr1_LU
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4199344U, // MADDSUMS_H_rrr1_UL
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@ -1034,14 +1034,14 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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4199285U, // MADDS_H_rrr1_UU
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4199726U, // MADDS_Q_rrr1
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4199726U, // MADDS_Q_rrr1_L
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2000688430U, // MADDS_Q_rrr1_L_L
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2269123886U, // MADDS_Q_rrr1_L_L
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4199726U, // MADDS_Q_rrr1_U
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2017465646U, // MADDS_Q_rrr1_U_U
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2285901102U, // MADDS_Q_rrr1_U_U
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4199726U, // MADDS_Q_rrr1_e
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4199726U, // MADDS_Q_rrr1_e_L
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2000688430U, // MADDS_Q_rrr1_e_L_L
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2269123886U, // MADDS_Q_rrr1_e_L_L
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4199726U, // MADDS_Q_rrr1_e_U
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2017465646U, // MADDS_Q_rrr1_e_U_U
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2285901102U, // MADDS_Q_rrr1_e_U_U
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806360884U, // MADDS_U_rcr
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806360884U, // MADDS_U_rcr_e
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4200244U, // MADDS_U_rrr2
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@ -1057,14 +1057,14 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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4199105U, // MADD_H_rrr1_UU
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4199670U, // MADD_Q_rrr1
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4199670U, // MADD_Q_rrr1_L
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2000688374U, // MADD_Q_rrr1_L_L
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2269123830U, // MADD_Q_rrr1_L_L
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4199670U, // MADD_Q_rrr1_U
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2017465590U, // MADD_Q_rrr1_U_U
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2285901046U, // MADD_Q_rrr1_U_U
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4199670U, // MADD_Q_rrr1_e
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4199670U, // MADD_Q_rrr1_e_L
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2000688374U, // MADD_Q_rrr1_e_L_L
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2269123830U, // MADD_Q_rrr1_e_L_L
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4199670U, // MADD_Q_rrr1_e_U
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2017465590U, // MADD_Q_rrr1_e_U_U
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2285901046U, // MADD_Q_rrr1_e_U_U
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806360797U, // MADD_U_rcr
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4200157U, // MADD_U_rrr2
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806359546U, // MADD_rcr
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@ -1079,7 +1079,7 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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6019U, // MAX_U_rr
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268441704U, // MAX_rc
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6248U, // MAX_rr
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11539821U, // MFCR_rlc
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12588397U, // MFCR_rlc
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4482U, // MIN_B
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6033U, // MIN_BU
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4886U, // MIN_H
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@ -1088,8 +1088,8 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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5906U, // MIN_U_rr
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268440765U, // MIN_rc
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5309U, // MIN_rr
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11538664U, // MOVH_A_rlc
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11539524U, // MOVH_rlc
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12587240U, // MOVH_A_rlc
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12588100U, // MOVH_rlc
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17830181U, // MOV_AA_rr
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16781605U, // MOV_AA_srr
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2913U, // MOV_A_rr
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@ -1097,9 +1097,9 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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16781571U, // MOV_A_srr
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17830381U, // MOV_D_rr
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16781805U, // MOV_D_srr
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11540346U, // MOV_U_rlc
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11540504U, // MOV_rlcDc
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11540504U, // MOV_rlcEc
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12588922U, // MOV_U_rlc
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12589080U, // MOV_rlcDc
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12589080U, // MOV_rlcEc
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17831960U, // MOV_rrDcDb
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6168U, // MOV_rrEcDaDb
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17831960U, // MOV_rrEcDb
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@ -1144,29 +1144,29 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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4199356U, // MSUBRS_H_rrr1_LU
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4199356U, // MSUBRS_H_rrr1_UL
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4199356U, // MSUBRS_H_rrr1_UU
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2000688439U, // MSUBRS_Q_rrr1_L_L
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2017465655U, // MSUBRS_Q_rrr1_U_U
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2269123895U, // MSUBRS_Q_rrr1_L_L
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2285901111U, // MSUBRS_Q_rrr1_U_U
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4199210U, // MSUBR_H_rrr1_DcEdDaDbUL
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4199210U, // MSUBR_H_rrr1_LL
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4199210U, // MSUBR_H_rrr1_LU
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4199210U, // MSUBR_H_rrr1_UL
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4199210U, // MSUBR_H_rrr1_UU
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2000688395U, // MSUBR_Q_rrr1_L_L
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2017465611U, // MSUBR_Q_rrr1_U_U
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2269123851U, // MSUBR_Q_rrr1_L_L
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2285901067U, // MSUBR_Q_rrr1_U_U
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4199265U, // MSUBS_H_rrr1_LL
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4199265U, // MSUBS_H_rrr1_LU
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4199265U, // MSUBS_H_rrr1_UL
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4199265U, // MSUBS_H_rrr1_UU
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4199717U, // MSUBS_Q_rrr1
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4199717U, // MSUBS_Q_rrr1_L
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2000688421U, // MSUBS_Q_rrr1_L_L
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2269123877U, // MSUBS_Q_rrr1_L_L
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4199717U, // MSUBS_Q_rrr1_U
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2017465637U, // MSUBS_Q_rrr1_U_U
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2285901093U, // MSUBS_Q_rrr1_U_U
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4199717U, // MSUBS_Q_rrr1_e
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4199717U, // MSUBS_Q_rrr1_e_L
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2000688421U, // MSUBS_Q_rrr1_e_L_L
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2269123877U, // MSUBS_Q_rrr1_e_L_L
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4199717U, // MSUBS_Q_rrr1_e_U
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2017465637U, // MSUBS_Q_rrr1_e_U_U
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2285901093U, // MSUBS_Q_rrr1_e_U_U
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806360884U, // MSUBS_U_rcr
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806360884U, // MSUBS_U_rcr_e
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4200244U, // MSUBS_U_rrr2
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@ -1182,21 +1182,21 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
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4199087U, // MSUB_H_rrr1_UU
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4199662U, // MSUB_Q_rrr1
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4199662U, // MSUB_Q_rrr1_L
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2000688366U, // MSUB_Q_rrr1_L_L
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2269123822U, // MSUB_Q_rrr1_L_L
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4199662U, // MSUB_Q_rrr1_U
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2017465582U, // MSUB_Q_rrr1_U_U
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2285901038U, // MSUB_Q_rrr1_U_U
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4199662U, // MSUB_Q_rrr1_e
|
||||
4199662U, // MSUB_Q_rrr1_e_L
|
||||
2000688366U, // MSUB_Q_rrr1_e_L_L
|
||||
2269123822U, // MSUB_Q_rrr1_e_L_L
|
||||
4199662U, // MSUB_Q_rrr1_e_U
|
||||
2017465582U, // MSUB_Q_rrr1_e_U_U
|
||||
2285901038U, // MSUB_Q_rrr1_e_U_U
|
||||
806360797U, // MSUB_U_rcr
|
||||
4200157U, // MSUB_U_rrr2
|
||||
806359497U, // MSUB_rcr
|
||||
806359497U, // MSUB_rcr_e
|
||||
4198857U, // MSUB_rrr2
|
||||
4198857U, // MSUB_rrr2_e
|
||||
42355U, // MTCR_rlc
|
||||
46451U, // MTCR_rlc
|
||||
4867U, // MULM_H_rr1_LL2e
|
||||
4867U, // MULM_H_rr1_LU2e
|
||||
4867U, // MULM_H_rr1_UL2e
|
||||
@ -1205,8 +1205,8 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
|
||||
4935U, // MULR_H_rr1_LU2e
|
||||
4935U, // MULR_H_rr1_UL2e
|
||||
4935U, // MULR_H_rr1_UU2e
|
||||
2264929565U, // MULR_Q_rr1_2LL
|
||||
2281706781U, // MULR_Q_rr1_2UU
|
||||
2533365021U, // MULR_Q_rr1_2LL
|
||||
2550142237U, // MULR_Q_rr1_2UU
|
||||
268441405U, // MULS_U_rc
|
||||
5949U, // MULS_U_rr2
|
||||
268441023U, // MULS_rc
|
||||
@ -1216,8 +1216,8 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
|
||||
4831U, // MUL_H_rr1_LU2e
|
||||
4831U, // MUL_H_rr1_UL2e
|
||||
4831U, // MUL_H_rr1_UU2e
|
||||
2264929540U, // MUL_Q_rr1_2LL
|
||||
2281706756U, // MUL_Q_rr1_2UU
|
||||
2533364996U, // MUL_Q_rr1_2LL
|
||||
2550142212U, // MUL_Q_rr1_2UU
|
||||
5380U, // MUL_Q_rr1_2_L
|
||||
5380U, // MUL_Q_rr1_2_Le
|
||||
5380U, // MUL_Q_rr1_2_U
|
||||
@ -1337,67 +1337,67 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
|
||||
37117U, // ST_A_abs
|
||||
5462645U, // ST_A_bo_bso
|
||||
67571965U, // ST_A_bo_c
|
||||
1432834301U, // ST_A_bo_pos
|
||||
1399345405U, // ST_A_bo_pre
|
||||
1701269757U, // ST_A_bo_pos
|
||||
1667780861U, // ST_A_bo_pre
|
||||
101126397U, // ST_A_bo_r
|
||||
12786293U, // ST_A_bol
|
||||
13834869U, // ST_A_bol
|
||||
663710U, // ST_A_sc
|
||||
161684085U, // ST_A_sro
|
||||
727669U, // ST_A_ssr
|
||||
793205U, // ST_A_ssr_pos
|
||||
47909U, // ST_A_ssro
|
||||
52005U, // ST_A_ssro
|
||||
37293U, // ST_B_abs
|
||||
5462660U, // ST_B_bo_bso
|
||||
67572141U, // ST_B_bo_c
|
||||
1432834477U, // ST_B_bo_pos
|
||||
1399345581U, // ST_B_bo_pre
|
||||
1701269933U, // ST_B_bo_pos
|
||||
1667781037U, // ST_B_bo_pre
|
||||
101126573U, // ST_B_bo_r
|
||||
12786308U, // ST_B_bol
|
||||
13834884U, // ST_B_bol
|
||||
178461316U, // ST_B_sro
|
||||
727684U, // ST_B_ssr
|
||||
793220U, // ST_B_ssr_pos
|
||||
47921U, // ST_B_ssro
|
||||
52017U, // ST_B_ssro
|
||||
37172U, // ST_DA_abs
|
||||
5462652U, // ST_DA_bo_bso
|
||||
67572020U, // ST_DA_bo_c
|
||||
1432834356U, // ST_DA_bo_pos
|
||||
1399345460U, // ST_DA_bo_pre
|
||||
1701269812U, // ST_DA_bo_pos
|
||||
1667780916U, // ST_DA_bo_pre
|
||||
101126452U, // ST_DA_bo_r
|
||||
37351U, // ST_D_abs
|
||||
5462667U, // ST_D_bo_bso
|
||||
67572199U, // ST_D_bo_c
|
||||
1432834535U, // ST_D_bo_pos
|
||||
1399345639U, // ST_D_bo_pre
|
||||
1701269991U, // ST_D_bo_pos
|
||||
1667781095U, // ST_D_bo_pre
|
||||
101126631U, // ST_D_bo_r
|
||||
37906U, // ST_H_abs
|
||||
5462674U, // ST_H_bo_bso
|
||||
67572754U, // ST_H_bo_c
|
||||
1432835090U, // ST_H_bo_pos
|
||||
1399346194U, // ST_H_bo_pre
|
||||
1701270546U, // ST_H_bo_pos
|
||||
1667781650U, // ST_H_bo_pre
|
||||
101127186U, // ST_H_bo_r
|
||||
12786322U, // ST_H_bol
|
||||
13834898U, // ST_H_bol
|
||||
178461330U, // ST_H_sro
|
||||
727698U, // ST_H_ssr
|
||||
793234U, // ST_H_ssr_pos
|
||||
47933U, // ST_H_ssro
|
||||
52029U, // ST_H_ssro
|
||||
38219U, // ST_Q_abs
|
||||
5462725U, // ST_Q_bo_bso
|
||||
67573067U, // ST_Q_bo_c
|
||||
1432835403U, // ST_Q_bo_pos
|
||||
1399346507U, // ST_Q_bo_pre
|
||||
1701270859U, // ST_Q_bo_pos
|
||||
1667781963U, // ST_Q_bo_pre
|
||||
101127499U, // ST_Q_bo_r
|
||||
34432U, // ST_T
|
||||
39008U, // ST_W_abs
|
||||
5462782U, // ST_W_bo_bso
|
||||
67573856U, // ST_W_bo_c
|
||||
1432836192U, // ST_W_bo_pos
|
||||
1399347296U, // ST_W_bo_pre
|
||||
1701271648U, // ST_W_bo_pos
|
||||
1667782752U, // ST_W_bo_pre
|
||||
101128288U, // ST_W_bo_r
|
||||
12786430U, // ST_W_bol
|
||||
13835006U, // ST_W_bol
|
||||
178461438U, // ST_W_sro
|
||||
727806U, // ST_W_ssr
|
||||
793342U, // ST_W_ssr_pos
|
||||
47945U, // ST_W_ssro
|
||||
52041U, // ST_W_ssro
|
||||
4565U, // SUBC_rr
|
||||
6090U, // SUBS_HU_rr
|
||||
4962U, // SUBS_H_rr
|
||||
@ -1417,14 +1417,14 @@ MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
|
||||
3015U, // SVLCX_sys
|
||||
5462761U, // SWAPMSK_W_bo_bso
|
||||
67573805U, // SWAPMSK_W_bo_c
|
||||
1432836141U, // SWAPMSK_W_bo_pos
|
||||
1399347245U, // SWAPMSK_W_bo_pre
|
||||
1701271597U, // SWAPMSK_W_bo_pos
|
||||
1667782701U, // SWAPMSK_W_bo_pre
|
||||
101128237U, // SWAPMSK_W_bo_r
|
||||
38978U, // SWAP_W_abs
|
||||
5462773U, // SWAP_W_bo_bso
|
||||
67573826U, // SWAP_W_bo_c
|
||||
1432836162U, // SWAP_W_bo_pos
|
||||
1399347266U, // SWAP_W_bo_pre
|
||||
1701271618U, // SWAP_W_bo_pos
|
||||
1667782722U, // SWAP_W_bo_pre
|
||||
101128258U, // SWAP_W_bo_r
|
||||
13466U, // SYSCALL_rc
|
||||
3008U, // TRAPSV_sys
|
||||
@ -2555,7 +2555,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
uint64_t Bits = MnemonicInfo.second;
|
||||
assert(Bits != 0 && "Cannot print this instruction.");
|
||||
|
||||
// Fragment 0 encoded into 4 bits for 12 unique commands.
|
||||
// Fragment 0 encoded into 4 bits for 13 unique commands.
|
||||
switch ((Bits >> 12) & 15) {
|
||||
default: assert(0 && "Invalid command number.");
|
||||
case 0:
|
||||
@ -2577,7 +2577,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
break;
|
||||
case 4:
|
||||
// CALLA_b, CALL_b, FCALLA_b, FCALL_b, JA_b, JLA_b, JL_b, J_b
|
||||
printSExtImm_24(MI, 0, O);
|
||||
printDisp24Imm(MI, 0, O);
|
||||
return;
|
||||
break;
|
||||
case 5:
|
||||
@ -2588,12 +2588,12 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
// JEQ_sbc1, JEQ_sbc2, JNE_sbc1, JNE_sbc2
|
||||
printSExtImm_4(MI, 0, O);
|
||||
SStream_concat0(O, ", ");
|
||||
printPCRelImmOperand(MI, 1, O);
|
||||
printDisp4Imm(MI, 1, O);
|
||||
return;
|
||||
break;
|
||||
case 7:
|
||||
// JNZ_sb, JZ_sb, J_sb
|
||||
printSExtImm_8(MI, 0, O);
|
||||
printDisp8Imm(MI, 0, O);
|
||||
return;
|
||||
break;
|
||||
case 8:
|
||||
@ -2608,13 +2608,18 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
return;
|
||||
break;
|
||||
case 10:
|
||||
// LOOPU_brr
|
||||
printDisp15Imm(MI, 0, O);
|
||||
return;
|
||||
break;
|
||||
case 11:
|
||||
// MTCR_rlc
|
||||
printSExtImm_16(MI, 0, O);
|
||||
SStream_concat0(O, ", ");
|
||||
printOperand(MI, 1, O);
|
||||
return;
|
||||
break;
|
||||
case 11:
|
||||
case 12:
|
||||
// ST_A_ssro, ST_B_ssro, ST_H_ssro, ST_W_ssro
|
||||
printZExtImm_4(MI, 1, O);
|
||||
SStream_concat0(O, ", ");
|
||||
@ -2700,7 +2705,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
}
|
||||
|
||||
|
||||
// Fragment 2 encoded into 4 bits for 13 unique commands.
|
||||
// Fragment 2 encoded into 4 bits for 14 unique commands.
|
||||
switch ((Bits >> 20) & 15) {
|
||||
default: assert(0 && "Invalid command number.");
|
||||
case 0:
|
||||
@ -2742,12 +2747,12 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
// JEQ_brc, JGE_U_brc, JGE_brc, JLT_U_brc, JLT_brc, JNED_brc, JNEI_brc, J...
|
||||
printSExtImm_4(MI, 2, O);
|
||||
SStream_concat0(O, ", ");
|
||||
printPCRelImmOperand(MI, 0, O);
|
||||
printDisp15Imm(MI, 0, O);
|
||||
return;
|
||||
break;
|
||||
case 8:
|
||||
// JEQ_sbr1, JEQ_sbr2, JGEZ_sbr, JGTZ_sbr, JLEZ_sbr, JLTZ_sbr, JNE_sbr1, ...
|
||||
printPCRelImmOperand(MI, 1, O);
|
||||
printDisp4Imm(MI, 1, O);
|
||||
return;
|
||||
break;
|
||||
case 9:
|
||||
@ -2760,11 +2765,16 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
printZExtImm_4(MI, 1, O);
|
||||
break;
|
||||
case 11:
|
||||
// LOOP_brr
|
||||
printDisp15Imm(MI, 1, O);
|
||||
return;
|
||||
break;
|
||||
case 12:
|
||||
// MFCR_rlc, MOVH_A_rlc, MOVH_rlc, MOV_U_rlc, MOV_rlcDc, MOV_rlcEc
|
||||
printZExtImm_16(MI, 1, O);
|
||||
return;
|
||||
break;
|
||||
case 12:
|
||||
case 13:
|
||||
// ST_A_bol, ST_B_bol, ST_H_bol, ST_W_bol
|
||||
printSExtImm_16(MI, 2, O);
|
||||
SStream_concat0(O, ", ");
|
||||
@ -2838,7 +2848,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
}
|
||||
|
||||
|
||||
// Fragment 4 encoded into 4 bits for 9 unique commands.
|
||||
// Fragment 4 encoded into 4 bits for 10 unique commands.
|
||||
switch ((Bits >> 28) & 15) {
|
||||
default: assert(0 && "Invalid command number.");
|
||||
case 0:
|
||||
@ -2869,20 +2879,25 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
|
||||
return;
|
||||
break;
|
||||
case 5:
|
||||
// JEQ_A_brr, JEQ_brr, JGE_U_brr, JGE_brr, JLT_U_brr, JLT_brr, JNED_brr, ...
|
||||
printDisp15Imm(MI, 2, O);
|
||||
return;
|
||||
break;
|
||||
case 6:
|
||||
// LD_A_bo_bso, LD_A_bo_pos, LD_A_bo_pre, LD_BU_bo_bso, LD_BU_bo_pos, LD_...
|
||||
printSExtImm_10(MI, 2, O);
|
||||
return;
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
// LD_A_slr, LD_A_slr_post, LD_BU_slr, LD_BU_slr_post, LD_H_slr, LD_H_slr...
|
||||
return;
|
||||
break;
|
||||
case 7:
|
||||
case 8:
|
||||
// MADDRS_Q_rrr1_L_L, MADDRS_Q_rrr1_U_U, MADDR_Q_rrr1_L_L, MADDR_Q_rrr1_U...
|
||||
printZExtImm_2(MI, 4, O);
|
||||
return;
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
// MULR_Q_rr1_2LL, MULR_Q_rr1_2UU, MUL_Q_rr1_2LL, MUL_Q_rr1_2UU
|
||||
printZExtImm_2(MI, 3, O);
|
||||
return;
|
||||
|
||||
@ -1174,13 +1174,13 @@ static const MCOperandInfo OperandInfo76[] = { { TriCore_DataRegsRegClassID, 0,
|
||||
static const MCOperandInfo OperandInfo77[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo78[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo79[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo80[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo81[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo82[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo83[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo84[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo85[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo86[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo80[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo81[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo82[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo83[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo84[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo85[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo86[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo87[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo88[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo89[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
@ -1188,23 +1188,22 @@ static const MCOperandInfo OperandInfo90[] = { { TriCore_DataRegsRegClassID, 0,
|
||||
static const MCOperandInfo OperandInfo91[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo92[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo93[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo94[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo95[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo96[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo97[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo98[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo99[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo100[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo101[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo102[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo103[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo104[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo105[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo106[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo107[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo108[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo109[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo110[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
static const MCOperandInfo OperandInfo94[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo95[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo96[] = { { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo97[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo98[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo99[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo100[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo101[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo102[] = { { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo103[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo104[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo105[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo106[] = { { TriCore_AddrRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_DataRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo107[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, };
|
||||
static const MCOperandInfo OperandInfo108[] = { { TriCore_AddrExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { TriCore_ExtRegsRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, };
|
||||
static const MCOperandInfo OperandInfo109[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, };
|
||||
|
||||
static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 1, OperandInfo2 },
|
||||
@ -1659,18 +1658,18 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 3, OperandInfo66 },
|
||||
{ 3, OperandInfo66 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo52 },
|
||||
{ 1, OperandInfo64 },
|
||||
@ -1678,39 +1677,39 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo52 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo7 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo83 },
|
||||
{ 2, OperandInfo10 },
|
||||
{ 2, OperandInfo82 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo82 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo83 },
|
||||
{ 2, OperandInfo10 },
|
||||
{ 3, OperandInfo81 },
|
||||
{ 2, OperandInfo82 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo84 },
|
||||
{ 2, OperandInfo83 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo61 },
|
||||
{ 3, OperandInfo60 },
|
||||
@ -1720,11 +1719,11 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo85 },
|
||||
{ 3, OperandInfo84 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 2, OperandInfo86 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 2, OperandInfo85 },
|
||||
{ 3, OperandInfo86 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo52 },
|
||||
{ 2, OperandInfo52 },
|
||||
@ -1754,7 +1753,7 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 3, OperandInfo91 },
|
||||
{ 3, OperandInfo91 },
|
||||
{ 2, OperandInfo93 },
|
||||
{ 2, OperandInfo84 },
|
||||
{ 2, OperandInfo83 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo61 },
|
||||
{ 3, OperandInfo60 },
|
||||
@ -1798,10 +1797,10 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo80 },
|
||||
{ 3, OperandInfo86 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 1, OperandInfo3 },
|
||||
{ 2, OperandInfo94 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 3, OperandInfo68 },
|
||||
{ 3, OperandInfo45 },
|
||||
@ -1816,95 +1815,95 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 3, OperandInfo45 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo47 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo45 },
|
||||
@ -1928,140 +1927,140 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo52 },
|
||||
{ 3, OperandInfo50 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 3, OperandInfo68 },
|
||||
{ 2, OperandInfo67 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo84 },
|
||||
{ 2, OperandInfo83 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo65 },
|
||||
{ 3, OperandInfo65 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo84 },
|
||||
{ 2, OperandInfo83 },
|
||||
{ 2, OperandInfo47 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo96 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 5, OperandInfo94 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo97 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo97 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 5, OperandInfo95 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo98 },
|
||||
{ 4, OperandInfo59 },
|
||||
{ 4, OperandInfo99 },
|
||||
{ 2, OperandInfo101 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 3, OperandInfo103 },
|
||||
{ 3, OperandInfo102 },
|
||||
{ 3, OperandInfo65 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 4, OperandInfo58 },
|
||||
{ 4, OperandInfo102 },
|
||||
{ 3, OperandInfo103 },
|
||||
{ 4, OperandInfo101 },
|
||||
{ 3, OperandInfo102 },
|
||||
{ 3, OperandInfo65 },
|
||||
{ 3, OperandInfo46 },
|
||||
{ 3, OperandInfo103 },
|
||||
{ 3, OperandInfo102 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo65 },
|
||||
{ 2, OperandInfo47 },
|
||||
@ -2173,7 +2172,7 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 3, OperandInfo91 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 2, OperandInfo104 },
|
||||
{ 2, OperandInfo103 },
|
||||
{ 3, OperandInfo49 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 2, OperandInfo51 },
|
||||
@ -2182,14 +2181,14 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo105 },
|
||||
{ 3, OperandInfo104 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo106 },
|
||||
{ 3, OperandInfo107 },
|
||||
{ 2, OperandInfo105 },
|
||||
{ 3, OperandInfo106 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo56 },
|
||||
{ 3, OperandInfo91 },
|
||||
@ -2197,40 +2196,40 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 3, OperandInfo91 },
|
||||
{ 3, OperandInfo91 },
|
||||
{ 2, OperandInfo93 },
|
||||
{ 2, OperandInfo84 },
|
||||
{ 2, OperandInfo83 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo108 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 2, OperandInfo109 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo105 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo106 },
|
||||
{ 3, OperandInfo107 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 2, OperandInfo108 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo104 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo105 },
|
||||
{ 3, OperandInfo106 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo105 },
|
||||
{ 3, OperandInfo104 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo106 },
|
||||
{ 3, OperandInfo110 },
|
||||
{ 2, OperandInfo105 },
|
||||
{ 3, OperandInfo109 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo105 },
|
||||
{ 3, OperandInfo104 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo106 },
|
||||
{ 3, OperandInfo107 },
|
||||
{ 2, OperandInfo105 },
|
||||
{ 3, OperandInfo106 },
|
||||
{ 2, OperandInfo51 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo100 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo99 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo45 },
|
||||
{ 3, OperandInfo45 },
|
||||
@ -2250,16 +2249,16 @@ static const MCInstrDesc TriCoreInsts[] = {
|
||||
{ 2, OperandInfo47 },
|
||||
{ 0, 0 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo108 },
|
||||
{ 3, OperandInfo107 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 3, OperandInfo60 },
|
||||
{ 2, OperandInfo109 },
|
||||
{ 2, OperandInfo108 },
|
||||
{ 2, OperandInfo53 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo105 },
|
||||
{ 3, OperandInfo104 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 3, OperandInfo87 },
|
||||
{ 2, OperandInfo106 },
|
||||
{ 2, OperandInfo105 },
|
||||
{ 1, OperandInfo2 },
|
||||
{ 0, 0 },
|
||||
{ 0, 0 },
|
||||
|
||||
@ -131,34 +131,6 @@ static void printPairAddrRegsOperand(MCInst *MI, unsigned OpNum, SStream *O,
|
||||
SStream_concat0(O, "]");
|
||||
}
|
||||
|
||||
static void printSExtImm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
int64_t imm = MCOperand_getImm(MO);
|
||||
if (imm >= 0) {
|
||||
if (imm > HEX_THRESHOLD)
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
else
|
||||
SStream_concat(O, "%u", imm);
|
||||
} else {
|
||||
if (imm < -HEX_THRESHOLD)
|
||||
SStream_concat(O, "-0x%x", -imm);
|
||||
else
|
||||
SStream_concat(O, "-%u", -imm);
|
||||
}
|
||||
if (MI->csh->detail) {
|
||||
MI->flat_insn->detail->tricore
|
||||
.operands[MI->flat_insn->detail->tricore.op_count]
|
||||
.type = TRICORE_OP_IMM;
|
||||
MI->flat_insn->detail->tricore
|
||||
.operands[MI->flat_insn->detail->tricore.op_count]
|
||||
.imm = (unsigned short int) imm;
|
||||
MI->flat_insn->detail->tricore.op_count++;
|
||||
}
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static inline void fill_tricore_imm(MCInst *MI, int64_t imm) {
|
||||
if (MI->csh->detail) {
|
||||
MI->flat_insn->detail->tricore
|
||||
@ -171,14 +143,19 @@ static inline void fill_tricore_imm(MCInst *MI, int64_t imm) {
|
||||
}
|
||||
}
|
||||
|
||||
static void sign_ext(MCInst *MI, int OpNum, SStream *O, unsigned n) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
int64_t imm = MCOperand_getImm(MO);
|
||||
static inline int64_t sign_ext(int64_t imm, unsigned n) {
|
||||
int64_t sign = imm >> (n - 1) & 0x1;
|
||||
for (unsigned i = n; i < 64; ++i) {
|
||||
imm = (imm & ~(1LL << i)) | (sign << i);
|
||||
}
|
||||
return imm;
|
||||
}
|
||||
|
||||
static void print_sign_ext(MCInst *MI, int OpNum, SStream *O, unsigned n) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
int64_t imm = MCOperand_getImm(MO);
|
||||
imm = sign_ext(imm, n);
|
||||
if (imm >= 0) {
|
||||
if (imm > HEX_THRESHOLD)
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
@ -218,7 +195,7 @@ static void off4_fixup(MCInst *MI, int64_t *off4) {
|
||||
}
|
||||
}
|
||||
|
||||
static void zero_ext(MCInst *MI, int OpNum, SStream *O, unsigned n) {
|
||||
static void print_zero_ext(MCInst *MI, int OpNum, SStream *O, unsigned n) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
int64_t imm = MCOperand_getImm(MO);
|
||||
@ -245,10 +222,160 @@ static void zero_ext(MCInst *MI, int OpNum, SStream *O, unsigned n) {
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printOff18Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
imm = ((imm & 0x3C000) << 14) | (imm & 0x3fff);
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printDisp24Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
switch (MCInst_getOpcode(MI)) {
|
||||
case TriCore_CALL_b:
|
||||
case TriCore_FCALL_b:
|
||||
imm = MI->address + sign_ext(imm * 2, 24);
|
||||
break;
|
||||
case TriCore_CALLA_b:
|
||||
case TriCore_FCALLA_b:
|
||||
case TriCore_JA_b:
|
||||
case TriCore_JLA_b:
|
||||
// = {disp24[23:20], 7’b0000000, disp24[19:0], 1’b0};
|
||||
imm = ((imm & 0xf00000) < 8) | ((imm & 0xfffff) << 1);
|
||||
break;
|
||||
case TriCore_J_b:
|
||||
case TriCore_JL_b:
|
||||
imm = MI->address + sign_ext(imm, 24) * 2;
|
||||
break;
|
||||
default:
|
||||
// handle other cases, if any
|
||||
break;
|
||||
}
|
||||
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printDisp15Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
switch (MCInst_getOpcode(MI)) {
|
||||
case TriCore_JEQ_brc:
|
||||
case TriCore_JEQ_brr:
|
||||
case TriCore_JEQ_A_brr:
|
||||
case TriCore_JGE_brc:
|
||||
case TriCore_JGE_brr:
|
||||
case TriCore_JGE_U_brc:
|
||||
case TriCore_JGE_U_brr:
|
||||
case TriCore_JLT_brc:
|
||||
case TriCore_JLT_brr:
|
||||
case TriCore_JLT_U_brc:
|
||||
case TriCore_JLT_U_brr:
|
||||
case TriCore_JNE_brc:
|
||||
case TriCore_JNE_brr:
|
||||
case TriCore_JNE_A_brr:
|
||||
case TriCore_JNED_brc:
|
||||
case TriCore_JNED_brr:
|
||||
case TriCore_JNEI_brc:
|
||||
case TriCore_JNEI_brr:
|
||||
case TriCore_JNZ_A_brr:
|
||||
case TriCore_JNZ_T_brn:
|
||||
case TriCore_JZ_A_brr:
|
||||
case TriCore_JZ_T_brn:
|
||||
imm = MI->address + sign_ext(imm, 15) * 2;
|
||||
break;
|
||||
case TriCore_LOOP_brr:
|
||||
case TriCore_LOOPU_brr:
|
||||
imm = MI->address + sign_ext(imm * 2, 15);
|
||||
break;
|
||||
default:
|
||||
// handle other cases, if any
|
||||
break;
|
||||
}
|
||||
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printDisp8Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
switch (MCInst_getOpcode(MI)) {
|
||||
// case TriCore_CALL_sb:
|
||||
// imm = MI->address + sign_ext(2 * imm, 8);
|
||||
case TriCore_J_sb:
|
||||
case TriCore_JNZ_sb:
|
||||
case TriCore_JZ_sb:
|
||||
imm = MI->address + sign_ext(imm, 8) * 2;
|
||||
default:
|
||||
// handle other cases, if any
|
||||
break;
|
||||
}
|
||||
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printDisp4Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
switch (MCInst_getOpcode(MI)) {
|
||||
case TriCore_JEQ_sbc1:
|
||||
case TriCore_JEQ_sbr1:
|
||||
case TriCore_JGEZ_sbr:
|
||||
case TriCore_JGTZ_sbr:
|
||||
case TriCore_JLEZ_sbr:
|
||||
case TriCore_JLTZ_sbr:
|
||||
case TriCore_JNE_sbc1:
|
||||
case TriCore_JNE_sbr1:
|
||||
case TriCore_JNZ_sbr:
|
||||
case TriCore_JNZ_A_sbr:
|
||||
case TriCore_JNZ_T_sbrn:
|
||||
case TriCore_JZ_sbr:
|
||||
case TriCore_JZ_A_sbr:
|
||||
case TriCore_JZ_T_sbrn:
|
||||
imm = MI->address + imm * 2;
|
||||
break;
|
||||
case TriCore_JEQ_sbc2:
|
||||
case TriCore_JEQ_sbr2:
|
||||
case TriCore_JNE_sbc2:
|
||||
case TriCore_JNE_sbr2:
|
||||
imm = MI->address + (imm + 16) * 2;
|
||||
break;
|
||||
case TriCore_LOOP_sbr:
|
||||
// {27b’111111111111111111111111111, disp4, 0};
|
||||
imm = MI->address + ((0b111111111111111111111111111 << 5) & (imm << 1));
|
||||
break;
|
||||
default:
|
||||
// handle other cases, if any
|
||||
break;
|
||||
}
|
||||
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
#define printSExtImm_(n) \
|
||||
static void printSExtImm_ ##n(MCInst *MI, int OpNum, SStream *O) \
|
||||
{ \
|
||||
sign_ext(MI, OpNum, O, n); \
|
||||
print_sign_ext(MI, OpNum, O, n); \
|
||||
}
|
||||
|
||||
printSExtImm_(24)
|
||||
@ -263,31 +390,10 @@ printSExtImm_(8)
|
||||
|
||||
printSExtImm_(4)
|
||||
|
||||
static inline void printZExtImm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint64_t imm = (unsigned) MCOperand_getImm(MO);
|
||||
if (imm > HEX_THRESHOLD)
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
else
|
||||
SStream_concat(O, "%u", imm);
|
||||
if (MI->csh->detail) {
|
||||
MI->flat_insn->detail->tricore
|
||||
.operands[MI->flat_insn->detail->tricore.op_count]
|
||||
.type = TRICORE_OP_IMM;
|
||||
MI->flat_insn->detail->tricore
|
||||
.operands[MI->flat_insn->detail->tricore.op_count]
|
||||
.imm = imm;
|
||||
MI->flat_insn->detail->tricore.op_count++;
|
||||
}
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
#define printZExtImm_(n) \
|
||||
static void printZExtImm_ ##n(MCInst *MI, int OpNum, SStream *O) \
|
||||
{ \
|
||||
zero_ext(MI, OpNum, O, n); \
|
||||
print_zero_ext(MI, OpNum, O, n); \
|
||||
}
|
||||
|
||||
printZExtImm_(16)
|
||||
@ -300,17 +406,6 @@ printZExtImm_(2)
|
||||
|
||||
printZExtImm_(1)
|
||||
|
||||
static void printOff18Imm(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *MO = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(MO)) {
|
||||
uint32_t imm = (uint32_t) MCOperand_getImm(MO);
|
||||
imm = ((imm & 0x3C000)<< 14) | (imm & 0x3fff);
|
||||
SStream_concat(O, "0x%x", imm);
|
||||
fill_tricore_imm(MI, imm);
|
||||
} else
|
||||
printOperand(MI, OpNum, O);
|
||||
}
|
||||
|
||||
static void printPCRelImmOperand(MCInst *MI, int OpNum, SStream *O) {
|
||||
MCOperand *Op = MCInst_getOperand(MI, OpNum);
|
||||
if (MCOperand_isImm(Op)) {
|
||||
|
||||
@ -187,6 +187,11 @@ def u16imm : Operand<i32> { let PrintMethod = "printZExtImm<16>"; }
|
||||
|
||||
def off18imm : Operand<i32> { let PrintMethod = "printOff18Imm"; }
|
||||
|
||||
def disp24imm : Operand<i32> { let PrintMethod = "printDisp24Imm"; }
|
||||
def disp15imm : Operand<i32> { let PrintMethod = "printDisp15Imm"; }
|
||||
def disp8imm : Operand<i32> { let PrintMethod = "printDisp8Imm"; }
|
||||
def disp4imm : Operand<i32> { let PrintMethod = "printDisp4Imm"; }
|
||||
|
||||
def bl_target : Operand<i32>;
|
||||
def b_target : Operand<OtherVT>;
|
||||
def cc_val : Operand<i32> { let PrintMethod = "printCondCode"; }
|
||||
@ -723,7 +728,7 @@ def CADDN_src : ISRC_a15<0xCA, "caddn">;
|
||||
// Call Instructions
|
||||
|
||||
class IB<bits<8> op1, string asmstr>
|
||||
: B<op1, (outs), (ins s24imm:$disp24),
|
||||
: B<op1, (outs), (ins disp24imm:$disp24),
|
||||
asmstr # " $disp24", []>;
|
||||
|
||||
// The target of a 24-bit call instruction.
|
||||
@ -999,7 +1004,7 @@ defm IXMAX : mI_U_RRR_EEdb<0x6B, 0x0A, 0x6B, 0x0B, "ixmax">;
|
||||
defm IXMIN : mI_U_RRR_EEdb<0x6B, 0x08, 0x6B, 0x09, "ixmin">;
|
||||
|
||||
class ISB<bits<8> op1, string asmstr>
|
||||
: SB<op1, (outs), (ins s8imm:$disp8), asmstr # " $disp8", []>;
|
||||
: SB<op1, (outs), (ins disp8imm:$disp8), asmstr # " $disp8", []>;
|
||||
|
||||
def J_b : IB<0x1D, "j">;
|
||||
def J_sb : ISB<0x3C, "j">;
|
||||
@ -1007,42 +1012,42 @@ def JA_b : IB<0x9D, "ja">;
|
||||
|
||||
// disp15
|
||||
class IBRR_0<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRR<op1, op2, (outs), (ins i32imm:$disp15), asmstr # " $disp15", []>;
|
||||
: BRR<op1, op2, (outs), (ins disp15imm:$disp15), asmstr # " $disp15", []>;
|
||||
// A[a], disp15
|
||||
class IBRR_Aa<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s1, i32imm:$disp15), asmstr # " $s1, $disp15", []>;
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s1, disp15imm:$disp15), asmstr # " $s1, $disp15", []>;
|
||||
// A[b], disp15
|
||||
class IBRR_Ab<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s2, i32imm:$disp15), asmstr # " $s2, $disp15", []>;
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s2, disp15imm:$disp15), asmstr # " $s2, $disp15", []>;
|
||||
// A[a], A[b], disp15
|
||||
class IBRR_AaAb<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s1, AddrRegs:$s2, i32imm:$disp15),
|
||||
: BRR<op1, op2, (outs), (ins AddrRegs:$s1, AddrRegs:$s2, disp15imm:$disp15),
|
||||
asmstr # " $s1, $s2, $disp15", []>;
|
||||
// D[a], D[b], disp15
|
||||
class IBRR<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRR<op1, op2, (outs), (ins DataRegs:$s1, DataRegs:$s2, i32imm:$disp15),
|
||||
: BRR<op1, op2, (outs), (ins DataRegs:$s1, DataRegs:$s2, disp15imm:$disp15),
|
||||
asmstr # " $s1, $s2, $disp15", []>;
|
||||
|
||||
|
||||
class IBRC<bits<8> op1, bits<1> op2, string asmstr>
|
||||
: BRC<op1, op2, (outs), (ins jmptarget:$disp15, DataRegs:$s1, s4imm:$const4),
|
||||
: BRC<op1, op2, (outs), (ins disp15imm:$disp15, DataRegs:$s1, s4imm:$const4),
|
||||
!strconcat(asmstr, " $s1, $const4, $disp15"), []>;
|
||||
|
||||
class ISBC<bits<8> op1, string asmstr>
|
||||
: SBC<op1, (outs), (ins s4imm:$const4, jmptarget:$disp4),
|
||||
: SBC<op1, (outs), (ins s4imm:$const4, disp4imm:$disp4),
|
||||
!strconcat(asmstr, " %d15, $const4, $disp4"), []>;
|
||||
|
||||
// D[15], D[b], disp4 (SBR)
|
||||
class ISBR_15b<bits<8> op1, string asmstr>
|
||||
: SBR<op1, (outs), (ins DataRegs:$s2, jmptarget:$disp4),
|
||||
: SBR<op1, (outs), (ins DataRegs:$s2, disp4imm:$disp4),
|
||||
!strconcat(asmstr, " %d15, $s2, $disp4"), []>;
|
||||
// D[b], disp4 (SBR)
|
||||
class ISBR_b<bits<8> op1, string asmstr>
|
||||
: SBR<op1, (outs), (ins DataRegs:$s2, jmptarget:$disp4),
|
||||
: SBR<op1, (outs), (ins DataRegs:$s2, disp4imm:$disp4),
|
||||
!strconcat(asmstr, " $s2, $disp4"), []>;
|
||||
// A[b], disp4 (SBR)
|
||||
class ISBR_Ab<bits<8> op1, string asmstr>
|
||||
: SBR<op1, (outs), (ins AddrRegs:$s2, jmptarget:$disp4),
|
||||
: SBR<op1, (outs), (ins AddrRegs:$s2, disp4imm:$disp4),
|
||||
!strconcat(asmstr, " $s2, $disp4"), []>;
|
||||
|
||||
multiclass mIBRC_BRR<bits<8> c1, bits<1> c2, bits<8> r1, bits<1> r2, string asmstr>{
|
||||
@ -1107,9 +1112,9 @@ multiclass mISB_SBR_T_BRN_SBRN<bits<8> sb, bits<8> sbr,
|
||||
def _sb : ISB<sb, asmstr>;
|
||||
def _sbr : ISBR_b<sbr, asmstr>;
|
||||
defm _A : mIBRR_SBR<a1, a2, a3, asmstr # ".a">;
|
||||
def _T_brn : BRN<brn1, brn2, (outs), (ins DataRegs:$s1, i32imm:$n, i32imm:$disp15),
|
||||
def _T_brn : BRN<brn1, brn2, (outs), (ins DataRegs:$s1, i32imm:$n, disp15imm:$disp15),
|
||||
asmstr # ".t $s1, $n, $disp15", []>;
|
||||
def _T_sbrn: SBRN<sbrn, (outs), (ins i32imm:$n, i32imm:$disp4),
|
||||
def _T_sbrn: SBRN<sbrn, (outs), (ins i32imm:$n, disp4imm:$disp4),
|
||||
asmstr # ".t %d15, $n, $disp4", []>;
|
||||
}
|
||||
|
||||
|
||||
590
suite/MC/TriCore/J_Call_Loop.s.cs
Normal file
590
suite/MC/TriCore/J_Call_Loop.s.cs
Normal file
@ -0,0 +1,590 @@
|
||||
# CS_ARCH_TRICORE, CS_MODE_TRICORE, None
|
||||
0x6d,0xff,0x9d,0xff = call 80001b58
|
||||
0x6d,0xff,0x02,0xfe = call 8000182a
|
||||
0x7f,0xf8,0x0b,0x80 = jge.u %d8, %d15, 80001c42
|
||||
0x3c,0x0b = j 80001c56
|
||||
0x6d,0xff,0xb3,0xff = call 80001bbe
|
||||
0xff,0x88,0x1f,0x80 = jge.u %d8, 8, 80001ca2
|
||||
0x6d,0x00,0x1b,0x00 = call 80001ca4
|
||||
0x5e,0x17 = jne %d15, 1, 80001c8a
|
||||
0x3c,0x08 = j 80001c98
|
||||
0x6d,0xff,0xbe,0xff = call 80001c1a
|
||||
0x6d,0xff,0x58,0xff = call 80001b58
|
||||
0x6d,0xff,0xbd,0xfd = call 8000182a
|
||||
0x7f,0xf8,0x0d,0x80 = jge.u %d8, %d15, 80001cd0
|
||||
0x3c,0x0d = j 80001ce8
|
||||
0x6d,0xff,0x6a,0xff = call 80001bbe
|
||||
0x6d,0xff,0x94,0xfa = call 8000121a
|
||||
0x3c,0x01 = j 80001d08
|
||||
0x6d,0xff,0x87,0xfa = call 8000121a
|
||||
0x3c,0x01 = j 80001d22
|
||||
0xbf,0x45,0x0b,0x80 = jlt.u %d5, 4, 80001d3a
|
||||
0x6f,0x04,0x05,0x00 = jz.t %d4, 0, 80001d34
|
||||
0x3c,0x03 = j 80001d38
|
||||
0x3c,0x01 = j 80001d3a
|
||||
0x3c,0x01 = j 80001d54
|
||||
0x6d,0xff,0x9a,0xff = call 80001ca4
|
||||
0x6d,0xff,0x4e,0xff = call 80001c1a
|
||||
0x6d,0xff,0x83,0xff = call 80001ca4
|
||||
0x6d,0xff,0x37,0xff = call 80001c1a
|
||||
0x6d,0xff,0x32,0xfa = call 8000121a
|
||||
0x6d,0xff,0xc3,0xff = call 80001d56
|
||||
0x3c,0x01 = j 80001dd8
|
||||
0x6d,0xff,0x1e,0xfa = call 8000121a
|
||||
0x7f,0x81,0x0a,0x80 = jge.u %d1, %d8, 80001e1a
|
||||
0x3c,0x01 = j 80001e1a
|
||||
0x3f,0x08,0x08,0x80 = jlt.u %d8, %d0, 80001e30
|
||||
0x7f,0x80,0x04,0x80 = jge.u %d0, %d8, 80001e34
|
||||
0x3c,0x05 = j 80001e3c
|
||||
0x6d,0xff,0xa6,0xff = call 80001d84
|
||||
0x3c,0x01 = j 80001e40
|
||||
0x6d,0xff,0x26,0xff = call 80001ca4
|
||||
0x6d,0xff,0xda,0xfe = call 80001c1a
|
||||
0xdf,0x04,0x31,0x00 = jeq %d4, 0, 80001ece
|
||||
0x76,0x6b = jz %d6, 80001eb6
|
||||
0x3c,0x0c = j 80001ecc
|
||||
0x3c,0x0b = j 80001ee2
|
||||
0x6d,0xff,0xdc,0xfe = call 80001ca4
|
||||
0x6d,0xff,0x8d,0xfe = call 80001c1a
|
||||
0x3c,0x0e = j 80001f24
|
||||
0x3c,0x01 = j 80001f1c
|
||||
0x6e,0x03 = jz %d15, 80001f22
|
||||
0x3c,0x01 = j 80001f22
|
||||
0xbf,0x81,0xf3,0xff = jlt.u %d1, 8, 80001f0a
|
||||
0xdf,0x10,0xee,0x7f = jeq %d0, 1, 80001f04
|
||||
0x3c,0x01 = j 80001f3a
|
||||
0x3c,0x01 = j 80001f42
|
||||
0x6d,0xff,0xa6,0xfe = call 80001ca4
|
||||
0x6d,0xff,0x19,0xfe = call 80001ca4
|
||||
0xee,0x08 = jnz %d15, 80002088
|
||||
0x3c,0x09 = j 80002098
|
||||
0x6d,0xff,0xbc,0xfd = call 80001c1a
|
||||
0x6e,0x20 = jz %d15, 8000211a
|
||||
0x6d,0xff,0x22,0xfe = call 80001d24
|
||||
0x3c,0x01 = j 8000211a
|
||||
0xff,0x8f,0x1a,0x80 = jge.u %d15, 8, 80002150
|
||||
0x3c,0x1b = j 80002184
|
||||
0x6e,0x29 = jz %d15, 800021da
|
||||
0x6d,0xff,0xcb,0xfd = call 80001d24
|
||||
0x3c,0x01 = j 800021da
|
||||
0x6d,0xff,0x1e,0xfd = call 80001c1a
|
||||
0x3c,0x01 = j 800021f0
|
||||
0xfc,0x6e = loop %a6, 80002204
|
||||
0x6d,0xff,0x5c,0xfd = call 80001cf0
|
||||
0x6d,0xff,0x2e,0xfd = call 80001ca4
|
||||
0x5e,0x1b = jne %d15, 1, 80002266
|
||||
0x6d,0xff,0x06,0xfe = call 80001e6c
|
||||
0x3c,0x08 = j 80002274
|
||||
0x6d,0xff,0xfe,0xfd = call 80001e6c
|
||||
0x5e,0x1b = jne %d15, 1, 8000228e
|
||||
0x6d,0xff,0xf2,0xfd = call 80001e6c
|
||||
0x3c,0x08 = j 8000229c
|
||||
0x6d,0xff,0xea,0xfd = call 80001e6c
|
||||
0x5e,0x1b = jne %d15, 1, 800022b6
|
||||
0x6d,0xff,0xde,0xfd = call 80001e6c
|
||||
0x3c,0x08 = j 800022c4
|
||||
0x6d,0xff,0xd6,0xfd = call 80001e6c
|
||||
0x5f,0x9f,0x23,0x00 = jeq %d15, %d9, 8000230c
|
||||
0x3c,0x01 = j 800022e2
|
||||
0x3c,0x01 = j 8000230c
|
||||
0xdf,0x1f,0x5d,0x80 = jne %d15, 1, 800023e0
|
||||
0x6e,0x2d = jz %d15, 8000238c
|
||||
0xfe,0x04 = jne %d15, %d0, 8000238a
|
||||
0x3c,0x01 = j 8000238a
|
||||
0x3c,0x07 = j 80002398
|
||||
0xbe,0x05 = jeq %d15, %d0, 800023c8
|
||||
0x3c,0x01 = j 800023c8
|
||||
0x6e,0x03 = jz %d15, 800023d0
|
||||
0x3c,0x02 = j 800023d2
|
||||
0x3c,0x01 = j 800023e0
|
||||
0xdf,0x1f,0x5d,0x80 = jne %d15, 1, 8000249e
|
||||
0x6e,0x2d = jz %d15, 8000244a
|
||||
0xfe,0x04 = jne %d15, %d0, 80002448
|
||||
0x3c,0x01 = j 80002448
|
||||
0x3c,0x07 = j 80002456
|
||||
0xbe,0x05 = jeq %d15, %d0, 80002486
|
||||
0x3c,0x01 = j 80002486
|
||||
0x6e,0x03 = jz %d15, 8000248e
|
||||
0x3c,0x02 = j 80002490
|
||||
0x3c,0x01 = j 8000249e
|
||||
0xdf,0x1f,0x57,0x80 = jne %d15, 1, 80002550
|
||||
0x6e,0x2d = jz %d15, 80002508
|
||||
0xfe,0x04 = jne %d15, %d0, 80002506
|
||||
0x3c,0x01 = j 80002506
|
||||
0x3c,0x01 = j 80002508
|
||||
0xbe,0x05 = jeq %d15, %d0, 80002538
|
||||
0x3c,0x01 = j 80002538
|
||||
0x6e,0x03 = jz %d15, 80002540
|
||||
0x3c,0x02 = j 80002542
|
||||
0x3c,0x01 = j 80002550
|
||||
0x7e,0x93 = jne %d15, %d9, 80002558
|
||||
0x3c,0x02 = j 8000255a
|
||||
0x6d,0xff,0x7a,0xfb = call 80001c5e
|
||||
0x3c,0x36 = j 800025dc
|
||||
0x7f,0x0f,0x07,0x80 = jge.u %d15, %d0, 800025b8
|
||||
0x3c,0x01 = j 800025be
|
||||
0xbf,0x21,0xcb,0xff = jlt.u %d1, 2, 80002572
|
||||
0x6d,0xff,0x18,0xfb = call 80001c1a
|
||||
0x3c,0x01 = j 800025f2
|
||||
0xfc,0x6e = loop %a6, 80002606
|
||||
0x6d,0xff,0x85,0xfa = call 80001b30
|
||||
0x6d,0xff,0xd6,0xf8 = call 800017da
|
||||
0x6d,0xff,0x9c,0xfa = call 80001b70
|
||||
0x6d,0xff,0x00,0xfc = call 80001e42
|
||||
0x6d,0xff,0xc6,0xfb = call 80001dda
|
||||
0xf6,0x23 = jnz %d2, 80002658
|
||||
0x3c,0x63 = j 8000271c
|
||||
0x6d,0xff,0xa9,0xfb = call 80001db2
|
||||
0x6d,0xff,0x45,0xfb = call 80001cf0
|
||||
0x3c,0x34 = j 800026d4
|
||||
0x7f,0x0f,0x07,0x80 = jge.u %d15, %d0, 800026b0
|
||||
0x3c,0x01 = j 800026b6
|
||||
0xbf,0x21,0xcd,0xff = jlt.u %d1, 2, 8000266e
|
||||
0xde,0x1e = jne %d15, 1, 80002718
|
||||
0x3c,0x17 = j 8000270e
|
||||
0x6d,0xff,0xde,0xfa = call 80001ca4
|
||||
0x6d,0xff,0x89,0xfa = call 80001c1a
|
||||
0xbf,0x89,0xea,0xff = jlt.u %d9, 8, 800026e2
|
||||
0x6d,0xff,0xe8,0xfb = call 80001ee4
|
||||
0x3c,0x01 = j 8000271c
|
||||
0x6d,0xff,0xee,0xfa = call 80001d0a
|
||||
0x6d,0xff,0x73,0xf5 = call 8000121a
|
||||
0xee,0x06 = jnz %d15, 8000114c
|
||||
0x3c,0x11 = j 8000116c
|
||||
0x5e,0x19 = jne %d15, 1, 8000116a
|
||||
0x3c,0x02 = j 8000116c
|
||||
0x3c,0x01 = j 8000116e
|
||||
0x6d,0xff,0xde,0xff = call 80001134
|
||||
0x5e,0x1a = jne %d15, 1, 80001196
|
||||
0x3c,0x29 = j 800011e6
|
||||
0x5e,0x1e = jne %d15, 1, 800011ba
|
||||
0x3c,0x17 = j 800011e6
|
||||
0x3c,0x01 = j 800011e8
|
||||
0x3e,0x04 = jeq %d15, %d0, 80001200
|
||||
0x3e,0x08 = jeq %d15, %d0, 8000120c
|
||||
0x3c,0x0a = j 80001212
|
||||
0x3c,0x01 = j 8000120a
|
||||
0x3c,0x06 = j 80001216
|
||||
0x6d,0xff,0xb2,0xff = call 80001170
|
||||
0x3c,0x03 = j 80001216
|
||||
0x3c,0x01 = j 80001216
|
||||
0x3c,0x01 = j 80001218
|
||||
0x6d,0xff,0xe8,0xff = call 800011ea
|
||||
0x3e,0x0c = jeq %d15, %d0, 80001244
|
||||
0xbe,0x0c = jeq %d15, %d0, 80001268
|
||||
0xbe,0x0f = jeq %d15, %d0, 80001272
|
||||
0x5f,0x0f,0x22,0x00 = jeq %d15, %d0, 8000127c
|
||||
0x5f,0x0f,0x24,0x00 = jeq %d15, %d0, 80001286
|
||||
0x3c,0x27 = j 80001290
|
||||
0xee,0x03 = jnz %d15, 80001254
|
||||
0x3c,0x0a = j 80001266
|
||||
0x3c,0x17 = j 80001294
|
||||
0x3c,0x12 = j 80001294
|
||||
0x3c,0x0d = j 80001294
|
||||
0x3c,0x08 = j 80001294
|
||||
0x3c,0x03 = j 80001294
|
||||
0x3c,0x01 = j 80001294
|
||||
0x3c,0x01 = j 80001296
|
||||
0x6d,0x00,0x43,0x04 = call 80001b30
|
||||
0x6d,0x00,0x54,0x04 = call 80001b58
|
||||
0x6d,0x00,0x91,0x02 = call 800017da
|
||||
0x6d,0x00,0x4a,0x04 = call 80001b70
|
||||
0x6d,0x00,0xa4,0x02 = call 8000182a
|
||||
0x3c,0x01 = j 800012e8
|
||||
0xee,0xfa = jnz %d15, 800012e8
|
||||
0x3c,0x01 = j 80001330
|
||||
0xee,0xfa = jnz %d15, 80001330
|
||||
0x6d,0x00,0xc4,0x01 = call 800016ec
|
||||
0x6d,0x00,0x29,0x04 = call 80001bbe
|
||||
0xdf,0x08,0x92,0x81 = jne %d8, 0, 80001694
|
||||
0x6d,0x00,0x5a,0x02 = call 8000182a
|
||||
0x3c,0x01 = j 8000137c
|
||||
0x6e,0xfa = jz %d15, 8000137c
|
||||
0x6d,0x00,0xbb,0x01 = call 800017a6
|
||||
0x3c,0x01 = j 80001436
|
||||
0x6e,0xfa = jz %d15, 80001436
|
||||
0x3c,0x01 = j 8000145a
|
||||
0xee,0xfa = jnz %d15, 8000145a
|
||||
0x3c,0x01 = j 8000147e
|
||||
0xee,0xfa = jnz %d15, 8000147e
|
||||
0x6d,0x00,0x8c,0x01 = call 800017a6
|
||||
0x3c,0x01 = j 800014c2
|
||||
0xee,0xfa = jnz %d15, 800014c2
|
||||
0x3c,0x01 = j 80001500
|
||||
0xee,0xfa = jnz %d15, 80001500
|
||||
0x3c,0x01 = j 80001538
|
||||
0xee,0xfa = jnz %d15, 80001538
|
||||
0x6d,0x00,0xf1,0x02 = call 80001bbe
|
||||
0x6d,0x00,0xe8,0x00 = call 800017da
|
||||
0x6d,0x00,0xab,0x02 = call 80001b70
|
||||
0x3c,0x37 = j 8000168e
|
||||
0x6d,0x00,0x03,0x01 = call 8000182a
|
||||
0x3c,0x01 = j 8000162a
|
||||
0x6e,0xfa = jz %d15, 8000162a
|
||||
0x6d,0x00,0xb3,0x02 = call 80001bbe
|
||||
0x6e,0x09 = jz %d15, 80001678
|
||||
0x2d,0x02,0x00,0x00 = calli %a2
|
||||
0x6d,0x00,0x91,0x00 = call 800017a6
|
||||
0x3f,0xfc,0xc9,0xff = jlt.u %d12, %d15, 80001622
|
||||
0x6d,0x00,0xca,0x00 = call 8000182a
|
||||
0x6d,0x00,0x87,0x02 = call 80001bbe
|
||||
0x6d,0x00,0x92,0x00 = call 800017da
|
||||
0x6d,0x00,0x47,0x02 = call 80001b70
|
||||
0x3c,0x01 = j 800016ea
|
||||
0x6d,0x00,0x1f,0x02 = call 80001b30
|
||||
0x3c,0x05 = j 80001758
|
||||
0xf6,0x83 = jnz %d8, 80001758
|
||||
0x3c,0x0d = j 80001770
|
||||
0x6f,0x1f,0xf8,0x7f = jz.t %d15, 1, 80001750
|
||||
0x6f,0x0f,0xf2,0x7f = jz.t %d15, 0, 80001750
|
||||
0x6d,0x00,0x34,0x00 = call 800017da
|
||||
0x6d,0x00,0xea,0x01 = call 80001b70
|
||||
0x3c,0x01 = j 800017a4
|
||||
0x6d,0xff,0x21,0xfd = call 800011ea
|
||||
0x3c,0x01 = j 800017c0
|
||||
0x3c,0x01 = j 800017ce
|
||||
0x3f,0xf0,0xfd,0xff = jlt.u %d0, %d15, 800017ce
|
||||
0x3c,0x01 = j 800017e2
|
||||
0x2e,0x1b = jz.t %d15, 1, 8000180a
|
||||
0x3c,0x01 = j 80001820
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80001820
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 80001856
|
||||
0x3c,0x01 = j 80001878
|
||||
0xdf,0x1f,0xfb,0x7f = jeq %d15, 1, 80001878
|
||||
0x3c,0x01 = j 80001890
|
||||
0x2e,0x1b = jz.t %d15, 1, 800018b6
|
||||
0x3c,0x01 = j 800018cc
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 800018cc
|
||||
0x2e,0x1b = jz.t %d15, 1, 800018f2
|
||||
0x3c,0x01 = j 80001908
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80001908
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 8000193c
|
||||
0x3c,0x01 = j 8000195e
|
||||
0xdf,0x1f,0xfb,0x7f = jeq %d15, 1, 8000195e
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 800019aa
|
||||
0x3c,0x01 = j 800019cc
|
||||
0x6f,0x0f,0xfc,0x7f = jz.t %d15, 0, 800019cc
|
||||
0x3c,0x01 = j 800019e2
|
||||
0x2e,0x1b = jz.t %d15, 1, 80001a08
|
||||
0x3c,0x01 = j 80001a1e
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80001a1e
|
||||
0x2e,0x1b = jz.t %d15, 1, 80001a46
|
||||
0x3c,0x01 = j 80001a5c
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80001a5c
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 80001a90
|
||||
0x3c,0x01 = j 80001ab2
|
||||
0xdf,0x1f,0xfb,0x7f = jeq %d15, 1, 80001ab2
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 80001b00
|
||||
0x3c,0x01 = j 80001b22
|
||||
0x6f,0x0f,0xfc,0x7f = jz.t %d15, 0, 80001b22
|
||||
0x3c,0x01 = j 80001b38
|
||||
0x3c,0x01 = j 80001b54
|
||||
0x3c,0x01 = j 80001b56
|
||||
0x3c,0x01 = j 80001b6c
|
||||
0x3c,0x01 = j 80001b6e
|
||||
0x3c,0x01 = j 80001b78
|
||||
0x2e,0x1b = jz.t %d15, 1, 80001ba0
|
||||
0x3c,0x01 = j 80001bb6
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80001bb6
|
||||
0x6f,0x1f,0x12,0x00 = jz.t %d15, 1, 80001bea
|
||||
0x3c,0x01 = j 80001c0c
|
||||
0x6f,0x0f,0xfc,0x7f = jz.t %d15, 0, 80001c0c
|
||||
0x3c,0x01 = j 80001072
|
||||
0x3c,0x01 = j 80001090
|
||||
0x3c,0x01 = j 8000109e
|
||||
0x3c,0x01 = j 8000102e
|
||||
0x3c,0x01 = j 8000104c
|
||||
0x3c,0x01 = j 8000105a
|
||||
0x3c,0x01 = j 80000fea
|
||||
0x3c,0x01 = j 80001008
|
||||
0x3c,0x01 = j 80001016
|
||||
0x3c,0x01 = j 80000fa6
|
||||
0x3c,0x01 = j 80000fc4
|
||||
0x3c,0x01 = j 80000fd2
|
||||
0x3c,0x01 = j 80000f62
|
||||
0x3c,0x01 = j 80000f80
|
||||
0x3c,0x01 = j 80000f8e
|
||||
0x3c,0x01 = j 80000f1e
|
||||
0x3c,0x01 = j 80000f3c
|
||||
0x3c,0x01 = j 80000f4a
|
||||
0x3c,0x01 = j 800010b6
|
||||
0x3c,0x01 = j 800010d4
|
||||
0x3c,0x01 = j 800010e2
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0x6d,0x00,0x2f,0x00 = call 800003a4
|
||||
0x3c,0x01 = j 80000354
|
||||
0x3e,0x28 = jeq %d15, %d2, 80000364
|
||||
0x3c,0x03 = j 80000368
|
||||
0x5e,0x13 = jne %d15, 1, 80000372
|
||||
0x3c,0x17 = j 8000039e
|
||||
0xee,0x13 = jnz %d15, 8000039c
|
||||
0x5e,0x13 = jne %d15, 1, 80000392
|
||||
0x3c,0x05 = j 8000039a
|
||||
0x5e,0x32 = jne %d15, 3, 8000039a
|
||||
0x3c,0x02 = j 8000039e
|
||||
0x3c,0x01 = j 800003a2
|
||||
0x3c,0x17 = j 800003d6
|
||||
0x7d,0x4f,0x0d,0x80 = jne.a %a15, %a4, 800003d4
|
||||
0x3c,0x04 = j 800003da
|
||||
0xbf,0x30,0xea,0xff = jlt.u %d0, 3, 800003aa
|
||||
0x3c,0x01 = j 800003dc
|
||||
0x6d,0xff,0xe0,0xff = call 800003a4
|
||||
0x6e,0x03 = jz %d15, 800003f0
|
||||
0x1e,0x32 = jeq %d15, 3, 800003f0
|
||||
0x5e,0x43 = jne %d15, 4, 800003f4
|
||||
0x3c,0x02 = j 800003f6
|
||||
0x5e,0x23 = jne %d15, 2, 800003fc
|
||||
0x3c,0x02 = j 800003fe
|
||||
0xdf,0x19,0x49,0x80 = jne %d9, 1, 80000490
|
||||
0x3c,0x01 = j 8000040a
|
||||
0x5f,0x8f,0x28,0x00 = jeq %d15, %d8, 8000045a
|
||||
0x6d,0x00,0xa5,0x0b = call 80001b58
|
||||
0x6d,0x00,0x0a,0x0a = call 8000182a
|
||||
0x6d,0xff,0xc0,0xff = call 800003a4
|
||||
0x6d,0x00,0xc3,0x0b = call 80001bbe
|
||||
0x3c,0x1c = j 80000490
|
||||
0x6d,0x00,0x6b,0x0b = call 80001b30
|
||||
0x6d,0x00,0xbc,0x09 = call 800017da
|
||||
0x6d,0x00,0x72,0x0b = call 80001b70
|
||||
0x3c,0x01 = j 80000494
|
||||
0x3c,0x01 = j 800004a0
|
||||
0xff,0x3f,0x0b,0x80 = jge.u %d15, 3, 800004b6
|
||||
0x3c,0x02 = j 800004b8
|
||||
0x3c,0x01 = j 800004ba
|
||||
0x7d,0xf4,0x04,0x80 = jne.a %a4, %a15, 800004c2
|
||||
0x3c,0x10 = j 800004e0
|
||||
0x3c,0x01 = j 800004e2
|
||||
0x6d,0xff,0xd6,0xff = call 80000496
|
||||
0x6d,0xff,0x28,0xff = call 80000342
|
||||
0xf6,0x26 = jnz %d2, 80000502
|
||||
0x6d,0xff,0x71,0xff = call 800003de
|
||||
0x3c,0x01 = j 80000506
|
||||
0x7e,0x0d = jne %d15, %d0, 8000052e
|
||||
0x3c,0x02 = j 80000530
|
||||
0x6d,0x00,0x5b,0x06 = call 800011ea
|
||||
0x3c,0x01 = j 8000054c
|
||||
0x3c,0x09 = j 80000576
|
||||
0x3f,0x0f,0x04,0x80 = jlt.u %d15, %d0, 80000576
|
||||
0x3c,0x05 = j 8000057e
|
||||
0xdf,0x7f,0xf6,0xff = jne %d15, 7, 80000566
|
||||
0x3c,0x01 = j 80000582
|
||||
0x3c,0x01 = j 80000598
|
||||
0x76,0x17 = jz %d1, 800005d0
|
||||
0x3c,0x01 = j 800005da
|
||||
0x3c,0x01 = j 800005f4
|
||||
0x2e,0x1b = jz.t %d15, 1, 8000061a
|
||||
0x3c,0x01 = j 80000630
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000630
|
||||
0x76,0x13 = jz %d1, 80000640
|
||||
0x3c,0x02 = j 80000642
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000674
|
||||
0x3c,0x01 = j 8000068a
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 8000068a
|
||||
0x3c,0x01 = j 800006a0
|
||||
0x3c,0x01 = j 800006ba
|
||||
0x2e,0x1b = jz.t %d15, 1, 800006e0
|
||||
0x3c,0x01 = j 800006f6
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 800006f6
|
||||
0x76,0x13 = jz %d1, 80000706
|
||||
0x3c,0x02 = j 80000708
|
||||
0x2e,0x1b = jz.t %d15, 1, 8000073a
|
||||
0x3c,0x01 = j 80000750
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000750
|
||||
0x2e,0x1b = jz.t %d15, 1, 8000077a
|
||||
0x3c,0x01 = j 80000790
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000790
|
||||
0x2e,0x1b = jz.t %d15, 1, 800007ee
|
||||
0x3c,0x01 = j 80000804
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000804
|
||||
0x3c,0x1e = j 80000886
|
||||
0xf6,0x06 = jnz %d0, 80000870
|
||||
0x3c,0x02 = j 80000872
|
||||
0x7e,0x05 = jne %d15, %d0, 8000087e
|
||||
0x3f,0x40,0xe3,0xff = jlt.u %d0, %d4, 8000084c
|
||||
0x6d,0x00,0x65,0x09 = call 80001b58
|
||||
0x6d,0x00,0xf9,0x07 = call 80001888
|
||||
0x6d,0x00,0x3a,0x08 = call 80001910
|
||||
0x6d,0xff,0xf2,0xfc = call 80000284
|
||||
0x6d,0x00,0x9a,0x08 = call 800019da
|
||||
0x6d,0x00,0xdc,0x08 = call 80001a64
|
||||
0x6d,0x00,0xf0,0x04 = call 80001298
|
||||
0x6d,0xff,0x0d,0xfe = call 800004e4
|
||||
0x6d,0xff,0x04,0xfe = call 800004e4
|
||||
0xdc,0x0f = ji %a15
|
||||
0xdc,0x0f = ji %a15
|
||||
0x3c,0x01 = j 80000900
|
||||
0x76,0x27 = jz %d2, 80000938
|
||||
0x3c,0x01 = j 80000942
|
||||
0x3c,0x01 = j 8000095c
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000982
|
||||
0x3c,0x01 = j 80000998
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000998
|
||||
0x76,0x23 = jz %d2, 800009a8
|
||||
0x3c,0x02 = j 800009aa
|
||||
0x2e,0x1b = jz.t %d15, 1, 800009dc
|
||||
0x3c,0x01 = j 800009f2
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 800009f2
|
||||
0x3c,0x01 = j 80000a08
|
||||
0x3c,0x01 = j 80000a22
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000a48
|
||||
0x3c,0x01 = j 80000a5e
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000a5e
|
||||
0x76,0x23 = jz %d2, 80000a6e
|
||||
0x3c,0x02 = j 80000a70
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000aa2
|
||||
0x3c,0x01 = j 80000ab8
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000ab8
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000ae2
|
||||
0x3c,0x01 = j 80000af8
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000af8
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000b56
|
||||
0x3c,0x01 = j 80000b6c
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000b6c
|
||||
0x3c,0x1e = j 80000bee
|
||||
0xf6,0x06 = jnz %d0, 80000bd8
|
||||
0x3c,0x02 = j 80000bda
|
||||
0x7e,0x05 = jne %d15, %d0, 80000be6
|
||||
0x3f,0x40,0xe3,0xff = jlt.u %d0, %d4, 80000bb4
|
||||
0xdc,0x0f = ji %a15
|
||||
0x3c,0x01 = j 80000c16
|
||||
0x76,0x27 = jz %d2, 80000c4e
|
||||
0x3c,0x01 = j 80000c58
|
||||
0x3c,0x01 = j 80000c72
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000c98
|
||||
0x3c,0x01 = j 80000cae
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000cae
|
||||
0x76,0x23 = jz %d2, 80000cbe
|
||||
0x3c,0x02 = j 80000cc0
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000cf2
|
||||
0x3c,0x01 = j 80000d08
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000d08
|
||||
0x3c,0x01 = j 80000d1e
|
||||
0x3c,0x01 = j 80000d38
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000d5e
|
||||
0x3c,0x01 = j 80000d74
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000d74
|
||||
0x76,0x23 = jz %d2, 80000d84
|
||||
0x3c,0x02 = j 80000d86
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000db8
|
||||
0x3c,0x01 = j 80000dce
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000dce
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000df8
|
||||
0x3c,0x01 = j 80000e0e
|
||||
0xdf,0x1f,0xfe,0x7f = jeq %d15, 1, 80000e0e
|
||||
0x2e,0x1b = jz.t %d15, 1, 80000e6c
|
||||
0x3c,0x01 = j 80000e82
|
||||
0x6f,0x0f,0xff,0x7f = jz.t %d15, 0, 80000e82
|
||||
0x3c,0x1e = j 80000f04
|
||||
0xf6,0x06 = jnz %d0, 80000eee
|
||||
0x3c,0x02 = j 80000ef0
|
||||
0x7e,0x05 = jne %d15, %d0, 80000efc
|
||||
0x3f,0x40,0xe3,0xff = jlt.u %d0, %d4, 80000eca
|
||||
0xdc,0x0f = ji %a15
|
||||
0x6d,0x00,0x71,0x12 = call 80002766
|
||||
0xfc,0x5e = loop %a5, 80002944
|
||||
0xfc,0x29 = loop %a2, 80002940
|
||||
0x6f,0x0f,0xfe,0xff = jnz.t %d15, 0, 80002950
|
||||
0x6f,0x1f,0xfa,0xff = jnz.t %d15, 1, 80002950
|
||||
0x1d,0x00,0x03,0x00 = j 80002986
|
||||
0x6d,0x00,0x02,0x01 = call 80000230
|
||||
0x6d,0x00,0xe1,0x00 = call 800001f2
|
||||
0x6d,0x00,0x0d,0x00 = call 8000004e
|
||||
0x6d,0x00,0x72,0x12 = call 8000271e
|
||||
0x6d,0x00,0xea,0x11 = call 8000261e
|
||||
0x6d,0x00,0xfa,0x11 = call 800025f4
|
||||
0x6d,0x00,0xf3,0x0f = call 80002210
|
||||
0x3c,0x50 = j 800000f2
|
||||
0x6d,0x00,0xc6,0x10 = call 800021f2
|
||||
0x6d,0x00,0x41,0x0f = call 80001f2e
|
||||
0xbf,0x48,0xb1,0xff = jlt.u %d8, 4, 80000054
|
||||
0x3c,0x01 = j 80000272
|
||||
0x3c,0x01 = j 80000274
|
||||
0x6f,0x70,0xec,0x7f = jz.t %d0, 7, 80000250
|
||||
0x3c,0x01 = j 80000282
|
||||
0x6d,0x00,0x50,0x0c = call 80001b30
|
||||
0x6d,0x00,0xf9,0x0a = call 80001888
|
||||
0x6d,0x00,0x5f,0x0c = call 80001b58
|
||||
0x6d,0x00,0x38,0x0b = call 80001910
|
||||
0x6d,0x00,0x44,0x00 = call 80000334
|
||||
0x6d,0x00,0x27,0x01 = call 80000508
|
||||
0x6d,0xff,0xb7,0xfe = call 8000002c
|
||||
0x3c,0x14 = j 800002fa
|
||||
0x6d,0xff,0xbd,0xff = call 80000250
|
||||
0x6d,0xff,0xb9,0xff = call 80000250
|
||||
0x6d,0xff,0xb4,0xff = call 80000250
|
||||
0x6d,0xff,0xaf,0xff = call 80000250
|
||||
0x3c,0xed = j 800002d4
|
||||
0x3c,0x01 = j 80000300
|
||||
0xfc,0xf6 = loop %a15, 800028a8
|
||||
0xfd,0xf0,0xed,0x7f = loop %a15, 800028d8
|
||||
0xdf,0x1f,0x23,0x80 = jne %d15, 1, 800027cc
|
||||
0xfe,0x04 = jne %d15, %d0, 800027bc
|
||||
0x6e,0x04 = jz %d15, 8000279e
|
||||
0x76,0xcf = jz %d12, 800027bc
|
||||
0x6e,0x09 = jz %d15, 800027ba
|
||||
0xfc,0x4e = loop %a4, 800027b2
|
||||
0xdf,0x0c,0xe0,0x7f = jeq %d12, 0, 8000277c
|
||||
0xfc,0x2e = loop %a2, 800027c4
|
||||
0x3c,0xd9 = j 8000277c
|
||||
0xde,0x25 = jne %d15, 2, 800027f6
|
||||
0x2e,0x03 = jz.t %d15, 0, 800027d6
|
||||
0xdf,0x0c,0xd3,0x7f = jeq %d12, 0, 8000277c
|
||||
0x76,0xc5 = jz %d12, 800027ea
|
||||
0xfc,0x2f = loop %a2, 800027e6
|
||||
0x6e,0xc9 = jz %d15, 8000277c
|
||||
0xfc,0x2f = loop %a2, 800027f0
|
||||
0x3c,0xc4 = j 8000277c
|
||||
0xdf,0x00,0x2e,0x00 = jeq %d0, 0, 80002856
|
||||
0xdf,0x10,0x2b,0x80 = jne %d0, 1, 80002858
|
||||
0xfe,0xdb = jne %d15, %d13, 80002846
|
||||
0x76,0xdb = jz %d13, 80002828
|
||||
0x6d,0x00,0x53,0x00 = call 800028c0
|
||||
0x76,0xcf = jz %d12, 80002846
|
||||
0x6e,0x09 = jz %d15, 80002844
|
||||
0xfc,0x4e = loop %a4, 8000283c
|
||||
0xdf,0x0c,0x9b,0x7f = jeq %d12, 0, 8000277c
|
||||
0x6d,0x00,0x38,0x00 = call 800028c0
|
||||
0x3c,0x94 = j 8000277c
|
||||
0xdf,0x2f,0x91,0xff = jne %d15, 2, 8000277c
|
||||
0x6e,0x07 = jz %d15, 80002870
|
||||
0x6d,0x00,0x15,0x00 = call 80002892
|
||||
0xdf,0x0c,0x86,0x7f = jeq %d12, 0, 8000277c
|
||||
0x76,0xc5 = jz %d12, 80002884
|
||||
0xfc,0x2f = loop %a2, 80002880
|
||||
0xdf,0x04,0x7c,0x7f = jeq %d4, 0, 8000277c
|
||||
0x6d,0x00,0x04,0x00 = call 80002892
|
||||
0x1d,0xff,0x77,0xff = j 8000277c
|
||||
0x1d,0x00,0x02,0x00 = j 80002772
|
||||
0x6d,0x00,0x15,0x0c = call 80001b30
|
||||
0x6d,0x00,0xbe,0x0a = call 80001888
|
||||
0x6d,0x00,0x0e,0x00 = call 80000334
|
||||
0x6d,0x00,0xf1,0x00 = call 80000508
|
||||
0x3c,0x01 = j 8000032c
|
||||
0x3c,0x00 = j 8000032c
|
||||
0x3c,0x01 = j 80000332
|
||||
0x3c,0x01 = j 800010f8
|
||||
0x3c,0x01 = j 80001116
|
||||
0x3c,0x01 = j 80001124
|
||||
Loading…
Reference in New Issue
Block a user