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243 Commits

Author SHA1 Message Date
Nguyen Anh Quynh
56128da515 arm64: for operand type IMM, value should have the type int64_t, not int32_t. all bindings should be fixed 2014-11-17 11:27:15 +08:00
Nguyen Anh Quynh
a7b06fda6e capstone.h: add comments on some hardware modes 2014-11-13 12:00:48 +08:00
Nguyen Anh Quynh
84df600944 tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:27:51 +08:00
Nguyen Anh Quynh
d3f0373ed1 add CS_MODE_MIPS32 & CS_MODE_MIPS64. these modes are aliases of CS_MODE_32 & CS_MODE_64, so no old code is broken 2014-11-13 11:20:09 +08:00
Nguyen Anh Quynh
cc60d10940 mips: add comments on mips32 & mips64 to capstone.h 2014-11-12 18:18:26 +08:00
Nguyen Anh Quynh
753f44a6b7 capstone.h: add comment for CS_ARCH_ALL 2014-11-12 11:05:42 +08:00
Nguyen Anh Quynh
8cdafda551 arm: add new field mem_barrier to cs_arm struct. this requires changes in bindings 2014-11-11 22:30:30 +08:00
Nguyen Anh Quynh
c942f22a09 arm: support new mode CS_MODE_V8 for Armv8 A32 encodings 2014-11-10 21:52:09 +08:00
Nguyen Anh Quynh
3ab509192a use common instruction groups across all architectures. this adds cs_group_type to capstone.h. suggestion by @zneak 2014-10-31 14:40:45 +08:00
Nguyen Anh Quynh
c58e704517 do not need to explicitly assign values for operand types in the last commit 2014-10-31 13:55:18 +08:00
Nguyen Anh Quynh
21ac056728 use common operand types across all architectures. this adds cs_op_type to capstone.h. suggestion by @zneak 2014-10-31 13:08:28 +08:00
Nguyen Anh Quynh
a18abdd178 capstone.h: coding style 2014-10-29 21:32:06 +08:00
Nguyen Anh Quynh
024e55ebeb capstone.h: add notes on cs_disasm() vs cs_disasm_iter() 2014-10-20 23:32:06 +08:00
Nguyen Anh Quynh
de65619fa8 x86: add prefix constants X86_PREFIX_*. suggested by Pancake 2014-10-18 06:15:49 +08:00
Nguyen Anh Quynh
85cfb1839c x86: get rid of redundant X86_INS_LOCK/REP/RENE. issue reported by Pancake 2014-10-18 05:53:32 +08:00
Nguyen Anh Quynh
aeaff79290 ppc: change type of ppc_op_crx.cond type to ppc_bc 2014-10-17 21:36:38 +08:00
Nguyen Anh Quynh
fcc5673070 ppc.h: add a comment for ppc_op_crx 2014-10-17 21:30:30 +08:00
kratolp
5c0d9a4ade Add '4*cri+cond' to operand list 2014-10-17 14:52:03 +02:00
Nguyen Anh Quynh
c41da15017 capstone.h: change cs_disasm to cs_disasm_iter in some places 2014-10-15 16:31:35 +08:00
Jay Oster
79e253c516 Remove CS_MODE_N64 
- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
 2014-10-12 16:03:12 -07:00
Nguyen Anh Quynh
2c8b2627d1 capstone.h: document that for instruction or when detail mode is OFF, the detail pointer is irrelevant, regardless of its value 2014-10-12 20:23:08 +08:00
Nguyen Anh Quynh
1a83cea5f5 Merge branch 'newapi' into next 2014-10-12 15:31:24 +08:00
Nguyen Anh Quynh
fb429b1eba capstone.h: note that in Skipdata mode, invalid instruction has id = 0 2014-10-12 15:29:12 +08:00
Nguyen Anh Quynh
ff2939a23c capstone.h: refer to sample code for skipdata option & cs_disasm_iter API 2014-10-12 10:43:02 +08:00
Nguyen Anh Quynh
801ce2b893 detail pointer is irrelevant when in skipdata mode 2014-10-12 10:36:57 +08:00
Nguyen Anh Quynh
f0acace803 Merge branch 'newapi' of https://github.com/aquynh/capstone into next 2014-10-12 10:30:57 +08:00
Nguyen Anh Quynh
542a540360 refine instructions of cs_free() to reflect the newly added API cs_malloc() 2014-10-11 13:12:15 +08:00
Nguyen Anh Quynh
5cb3d6401e refine some API instructions for capstone.h 2014-10-11 01:32:39 +08:00
Nguyen Anh Quynh
43efc45fb8 code style 2014-10-11 00:38:30 +08:00
Nguyen Anh Quynh
0a2eca7c6c modify API cs_disasm_iter() and add new API cs_malloc(). also adds sample code test_iter.c 2014-10-11 00:36:16 +08:00
Nguyen Anh Quynh
c64d6292fc mips: remove MIPS_REG_PC register. reviewed by Jay Oster 2014-10-10 21:11:50 +08:00
Nguyen Anh Quynh
8fb2eab459 arm: some operands can get subtracted from base register, thus have '-' sign associated. this adds subtracted field into cs_arm_op to provide this info. issue reported by Yegor Derevenets 2014-10-06 20:27:25 +08:00
hlide
993f362ad8 New API: cs_disasm_iter 2014-10-05 18:14:40 +02:00
Nguyen Anh Quynh
d7e42b7d36 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly 2014-09-29 17:15:25 +08:00
Nguyen Anh Quynh
aa58f7fca5 typo fix for capstone.h 2014-09-25 16:56:31 +08:00
Nguyen Anh Quynh
acbafc6d75 ocaml/python/java: fix some broken arm64 constants generated by const_generator.py 2014-09-25 12:46:17 +08:00
Nguyen Anh Quynh
54f8cef449 mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings 2014-09-24 22:53:54 +08:00
Nguyen Anh Quynh
5691dd4637 mips: fixed & added new instructions. also updated Ocaml/Python/Java bindings 2014-09-24 18:03:47 +08:00
Nguyen Anh Quynh
7e57e79800 ppc: handle branch condition for alias instructions. this also updates Python & Java bindings 2014-09-21 13:04:50 +08:00
Nguyen Anh Quynh
1738a3e6bf sparc: handle some alias instructions & more details for some special instructions. update Python & Java bindings accordingly with new instructions & registers 2014-09-17 00:01:04 +08:00
Nguyen Anh Quynh
eaecfa4925 ppc: add PPC_INS_BNE for alias instruction BNE 2014-09-16 23:13:14 +08:00
Nguyen Anh Quynh
2c425fcbe2 correct an incorrect comment on default value of skipdata mnem: .db -> .byte. bug reported by Ben Nagy 2014-09-07 09:46:54 +08:00
Nguyen Anh Quynh
721d07f6b2 ppc: support alias instructions. update Python & Java bindings accordingly 2014-09-04 12:03:31 +08:00
Nguyen Anh Quynh
04d9f8ee17 arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes 2014-09-01 23:27:24 +08:00
Nguyen Anh Quynh
4f0d7048cd arm64: vector_index = 0 is valid. this changed invalid value of vector_index to -1 2014-08-29 15:11:23 +08:00
Nguyen Anh Quynh
0beb0d494b api: get back the old API cs_disasm() & mark cs_disasm_ex() deprecated. cs_disasm_ex() will be removed in the future 2014-08-27 22:55:29 +08:00
Nguyen Anh Quynh
934e180e54 x86: more update to the core 2014-08-27 21:59:25 +08:00
Nguyen Anh Quynh
a7792ae488 systemz: update core. also update Python & Java bindings 2014-08-26 12:14:25 +08:00
Nguyen Anh Quynh
c286b346c6 Merge branch 'arm64' into v3 2014-08-25 17:01:53 +08:00
Nguyen Anh Quynh
0efef5dd48 solve some conflicts when merging -next into -v3 2014-08-25 17:01:45 +08:00