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303 Commits

Author SHA1 Message Date
Nguyen Anh Quynh
78d640045c cython: fix incomplete array of bytes returned by CsInsn.bytes. bug reported by @secretsquirrel 2015-01-07 22:08:35 +08:00
Maciej Szawlowski
2c24d88f89 fixed bug that prevented using md.detail = true and md.skipdata = true together 2014-12-31 10:33:05 +08:00
Nguyen Anh Quynh
2537cfd669 python: fix a memory leak issue when we stop enumeration over the disassembled instructions prematurely. patch by Jan Newger 2014-12-16 00:09:40 +08:00
Nguyen Anh Quynh
8ab01369d7 python: export generic operand types & groups 2014-11-19 22:12:40 +08:00
Nguyen Anh Quynh
89460299c3 python: python2.6 does not understand sys.versionn_info.major 2014-11-19 14:37:08 +08:00
Nguyen Anh Quynh
faa925ab8f fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op 2014-11-17 11:39:36 +08:00
Nguyen Anh Quynh
75c9b6a45c python: fix comments on hardware modes 2014-11-13 11:55:56 +08:00
Nguyen Anh Quynh
143a494ae7 python: add CS_MODE_MIPS32/64 2014-11-13 11:45:57 +08:00
Nguyen Anh Quynh
ec58a02c6d python: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 11:42:38 +08:00
Nguyen Anh Quynh
7e75ca6d21 python: CS_MODE_MIPS32R6 is independent from CS_MODE_32 2014-11-13 11:17:38 +08:00
Nguyen Anh Quynh
6782cbf5fd cython: support the newly added field mem_barrier in cs_arm 2014-11-12 11:22:16 +08:00
Nguyen Anh Quynh
128124c995 python: typo on README 2014-11-12 11:13:39 +08:00
Nguyen Anh Quynh
bd8543152a cython: add XCore to debug string 2014-11-12 11:04:39 +08:00
Nguyen Anh Quynh
9ba1906470 python: test_ppc.py prints crx.scale & crx.cond as integers 2014-11-12 10:13:11 +08:00
Nguyen Anh Quynh
0b3d95e4b3 java/ocaml/python: support the newly added mem_barrier field of cs_arm struct 2014-11-11 23:00:35 +08:00
Nguyen Anh Quynh
2e40e69207 arm: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 2014-11-11 21:54:22 +08:00
Nguyen Anh Quynh
c942f22a09 arm: support new mode CS_MODE_V8 for Armv8 A32 encodings 2014-11-10 21:52:09 +08:00
Nguyen Anh Quynh
248519efea mips: properly handle Mips32R6 mode. bug reported by Jay Oster 2014-11-09 14:07:07 +08:00
Nguyen Anh Quynh
a65d7ef5fa java/ocaml/python: update bindings after the last change on generic instruction groups 2014-10-31 15:47:17 +08:00
Nguyen Anh Quynh
69271ddf74 java/ocaml/python: add the missing generic instruction operand types 2014-10-31 14:32:34 +08:00
Nguyen Anh Quynh
b0464ef805 java/python/ocaml: update bindings after the last changes on operand types 2014-10-31 13:59:19 +08:00
Nguyen Anh Quynh
5720cb7ae1 tests: add tests for mips's modes: MIPS32R6 & MICRO (C & Python code) 2014-10-29 22:35:02 +08:00
Nguyen Anh Quynh
58086346bc java/python/ocaml: update after latest changes in x86.h 2014-10-18 06:16:26 +08:00
Nguyen Anh Quynh
4d2c362aa6 python: update after the latest change on PPC in the core 2014-10-17 21:51:13 +08:00
Jay Oster
79e253c516 Remove CS_MODE_N64 
- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
 2014-10-12 16:03:12 -07:00
Nguyen Anh Quynh
db8eaa3d0b bindings: remove MIPS_REG_PC constant following the change in the core 2014-10-10 21:13:30 +08:00
Nguyen Anh Quynh
b0cc71da59 bindings: update java/ocaml/python after the last change in Arm's core 2014-10-06 21:01:32 +08:00
Nguyen Anh Quynh
984d45068c Makefile: add 'check' target 2014-10-01 16:42:29 +08:00
Nguyen Anh Quynh
839890b83a tests: use cs_group_name() to print out group names in test_detail.c & test_detail.py 2014-10-01 10:51:18 +08:00
danghvu
ebeec9d9c2 Cython: update installation and tests to v3 2014-09-29 11:55:01 -05:00
Nguyen Anh Quynh
d7e42b7d36 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly 2014-09-29 17:15:25 +08:00
danghvu
2412069453 Fix python binding tests 2014-09-27 17:59:42 -05:00
Nguyen Anh Quynh
770cf6dfd7 cython: update to v3. still need more tests 2014-09-26 11:25:03 +08:00
Nguyen Anh Quynh
acbafc6d75 ocaml/python/java: fix some broken arm64 constants generated by const_generator.py 2014-09-25 12:46:17 +08:00
Nguyen Anh Quynh
54f8cef449 mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings 2014-09-24 22:53:54 +08:00
Nguyen Anh Quynh
5691dd4637 mips: fixed & added new instructions. also updated Ocaml/Python/Java bindings 2014-09-24 18:03:47 +08:00
Nguyen Anh Quynh
7e57e79800 ppc: handle branch condition for alias instructions. this also updates Python & Java bindings 2014-09-21 13:04:50 +08:00
Nguyen Anh Quynh
1738a3e6bf sparc: handle some alias instructions & more details for some special instructions. update Python & Java bindings accordingly with new instructions & registers 2014-09-17 00:01:04 +08:00
Nguyen Anh Quynh
7a9d19eaff python & java: update after the last PPC core update 2014-09-16 23:22:16 +08:00
Nguyen Anh Quynh
721d07f6b2 ppc: support alias instructions. update Python & Java bindings accordingly 2014-09-04 12:03:31 +08:00
Nguyen Anh Quynh
25538b04bb python: test_arm.py should handle SYSREG operand. issue reported by Ben Nagy 2014-09-03 11:22:18 +08:00
Nguyen Anh Quynh
04d9f8ee17 arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes 2014-09-01 23:27:24 +08:00
Nguyen Anh Quynh
4f0d7048cd arm64: vector_index = 0 is valid. this changed invalid value of vector_index to -1 2014-08-29 15:11:23 +08:00
Nguyen Anh Quynh
0beb0d494b api: get back the old API cs_disasm() & mark cs_disasm_ex() deprecated. cs_disasm_ex() will be removed in the future 2014-08-27 22:55:29 +08:00
Nguyen Anh Quynh
934e180e54 x86: more update to the core 2014-08-27 21:59:25 +08:00
Nguyen Anh Quynh
a7792ae488 systemz: update core. also update Python & Java bindings 2014-08-26 12:14:25 +08:00
Nguyen Anh Quynh
5166236e1c python: update after the latest changes in the core on arm64 2014-08-25 17:28:34 +08:00
Nguyen Anh Quynh
c286b346c6 Merge branch 'arm64' into v3 2014-08-25 17:01:53 +08:00
Nguyen Anh Quynh
0efef5dd48 solve some conflicts when merging -next into -v3 2014-08-25 17:01:45 +08:00
Nguyen Anh Quynh
46a74e53b7 arm64: update core. this added a lot more details to cs_arm64_op struct 2014-08-25 16:47:12 +08:00