Magic-Mirror/capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/capstone.git synced 2025-03-04 04:17:46 +00:00
Code Issues Actions 6 Packages Projects Releases Wiki Activity
2,169 Commits 14 Branches 44 Tags
Commit Graph

76 Commits

Author SHA1 Message Date
Cr4sh
19ee2d10b3 inttypes.h fix 2015-03-29 21:16:38 +08:00
Nguyen Anh Quynh
967e98786a suite: fix a MSVC warning 2015-02-25 18:12:10 +08:00
Nguyen Anh Quynh
4b68d9505e arm: fix some warnings reported by MSVC 2015-02-25 18:02:19 +08:00
Nguyen Anh Quynh
ea39692786 suite: fix an compilation warning reported by MSVC on test_arm_regression.c 2015-01-13 14:43:37 +08:00
Nguyen Anh Quynh
499f0ca7cb suite: add some tools to verify X86 machine code 2015-01-06 13:11:04 +07:00
Nguyen Anh Quynh
d83c8c7d44 suite: change CS_MODE_32 -> CS_MODE_MIPS32, CS_MODE_64 -> CS_MODE_MIPS64 for fuzz.py & benchmark.py 2014-11-17 17:38:18 +08:00
Nguyen Anh Quynh
57a902d045 suite: add crc32 instruction to x86odd.py 2014-11-16 19:48:41 +08:00
Nguyen Anh Quynh
b0082295a1 suite: add some tricky x86 code to x86odd.py 2014-11-16 19:08:25 +08:00
Nguyen Anh Quynh
02cafeb8bd suite: update Mips modes of MC input to CS_MODE_MIPS32 & CS_MODE_MIPS64 2014-11-13 12:46:48 +08:00
Nguyen Anh Quynh
952da90e5b suite: add missing tests to test_c.sh 2014-11-13 11:39:58 +08:00
Nguyen Anh Quynh
435b9137bf suite: delete duplicate MC input in ppc64-encoding-bookIII.s.cs 2014-11-11 13:56:37 +08:00
Nguyen Anh Quynh
4c36374e2d suite: normalize PPC's branch instructions having immediate operand 2014-11-11 12:51:57 +08:00
Nguyen Anh Quynh
df7dde26c9 suite: update test_mc.py to better handle output of different formats of MC & CS 2014-11-10 21:50:54 +08:00
Nguyen Anh Quynh
6999d22892 suite: fix inputs in MC/ 2014-11-10 21:49:53 +08:00
Nguyen Anh Quynh
d5e63414b1 suite: indentation for test_mc.py 2014-11-08 14:01:18 +08:00
Nguyen Anh Quynh
9025e92fe2 suite: cleaning up test_mc.py 2014-11-07 17:28:39 +08:00
Nguyen Anh Quynh
8ba7250a14 suite: add testsuite tool 'test_mc.sh' to compare output of Capstone & LLVM 2014-11-07 17:24:01 +08:00
Nguyen Anh Quynh
278afa3380 suite: delete a broken MC input in intel-syntax-encoding.s.cs 2014-11-07 16:37:17 +08:00
Nguyen Anh Quynh
9c9ca1290c suite: add missing arch in heading info for micromips-alu-instructions-EB.s.cs 2014-11-07 16:14:58 +08:00
Nguyen Anh Quynh
4016695162 suite: fix MC test for 'prefetch' in 3DNow.s.cs 2014-11-07 12:27:31 +08:00
Nguyen Anh Quynh
90d42bced8 suite: add decoding info for 3DNow.s.cs 2014-11-06 15:28:50 +08:00
Nguyen Anh Quynh
c352897bac suite: more tests added to x86odd.py 2014-11-04 11:04:32 +08:00
Nguyen Anh Quynh
ff7bba3d6d x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake 2014-11-03 16:32:06 +08:00
Nguyen Anh Quynh
b87f855281 x86: print negative number in memory reference address (more friendly). issue reported by @pancake 2014-11-02 23:38:35 +08:00
Nguyen Anh Quynh
ed0fbce85e suite: more test for memref (x86) 2014-11-02 23:32:39 +08:00
Nguyen Anh Quynh
668b96c0b9 suite: make x86odd.py to test ATT syntax & some memref code 2014-11-02 23:15:18 +08:00
Nguyen Anh Quynh
ad449b59cb suite: compile test_arm_regression.c with proper include & change cs_disasm_ex() to cs_disasm() 2014-10-24 00:36:48 +08:00
flyingsymbols
d91f964d40 * Fixed bug in Thumb2 pop caused by me incorrectly assuming that 
ARM_SP == 13, ARM_LR == 14, and ARM_PC == 15, which is not the case
* updated CMakeLists to include building arm regression test
* added explicit casts for 64 bit visual studio 2012 build to get around
  truncation warnings from size_t conversion
 2014-10-23 12:04:23 -04:00
Jay Oster
79e253c516 Remove CS_MODE_N64 
- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
 2014-10-12 16:03:12 -07:00
Nguyen Anh Quynh
147035ed62 suite: chmod +x ppcbranch.py 2014-10-01 18:17:37 +08:00
kratolp
a3f0aef79a PPC: Fix absolute/relative offset for branch instruction 
PPC: Fix non handling of bc instruction that uses the CTR
 2014-10-01 11:39:15 +02:00
kratolp
39a65299bd Add ppc branch test suite 2014-09-29 10:59:42 +02:00
Nguyen Anh Quynh
0b702b892d suite: add input files for systematic testing assembly instructions across all archs (MC) 2014-09-29 15:28:34 +08:00
Yegor Derevenets
ced9d24e35 Workaround missing <inttypes.h> on MSVC 2010 2014-09-21 17:27:11 +02:00
Nguyen Anh Quynh
3edc30d61b suite: correct author of test_arm_regression.c 2014-08-15 13:53:03 +08:00
Nguyen Anh Quynh
26dfbc6677 fix indentation introduced by the latest merge. also move test_arm_regression.c into suite/arm/ and add Makefile for it 2014-07-31 18:24:51 +08:00
flyingsymbols
298d413bbc * added a test file to suite for testing invalid and valid instruction sequences 
* fixed and added a test for a thumb-2 invalid sequence that was incorrectly allowed before these changes (pop.w with sp argument included)
* fixed and added a test for a blx from thumb to ARM that had its immediate argument incorrect (misaligned)

* eliminated some warnings by explicitly casting so I could turn on
  treat warnings as errors locally

General notes:
*  probably worth turning on treat all warnings as errors in the msvc project files, had a subtle bug that resulted from a missing declaration causing differences in dll and static compilation modes

( code was working incorrectly in dll form because of missing declaration in arch/ARM/ARMMapping.h for new function ARM_blx_to_arm_mode. Something about the linking was confusing ld when making the dll, and the resulting offsets were wonky (e.g. the added ble test would show up as #0x1fc instead of #0x1fe like it should have )

* the invalid pop was being treated as a soft fail which then gets coerced
  to a success because it is != MCDisassembler_Fail in Thumb_getInstruction
  what are the semantics of a soft fail? Maybe we should be able to set up
  whether or not we want a soft fail to be a real fail in the csh struct?
 2014-07-15 04:33:40 -04:00
Nguyen Anh Quynh
7ae389ede8 suite: support XCore in fuzz.py 2014-06-17 18:17:59 +08:00
Nguyen Anh Quynh
6a5cc570cc suite: support XCore in benchmark.py 2014-06-17 18:17:26 +08:00
Nguyen Anh Quynh
191c070cac suite: update x86odd.py 2014-04-24 22:50:54 +08:00
Nguyen Anh Quynh
d71106047d suite: add some new instructions to x86odd.py 2014-04-23 12:40:58 +08:00
Nguyen Anh Quynh
4cc304096c suite: add 'hint nop' instruction to x86odd.py 2014-04-22 19:59:20 +08:00
Nguyen Anh Quynh
33e16362d6 x86: support 0x82 opcode for Arithmetic instructions 2014-04-20 11:32:00 +08:00
Nguyen Anh Quynh
4171e487cb suite: make x86odd support python3 2014-04-16 20:44:10 +08:00
Nguyen Anh Quynh
a6519b08eb suite: add x86odd.py 2014-04-16 20:03:55 +08:00
Nguyen Anh Quynh
61aaabbba0 suite: add SystemZ support to benchmark.py & fuzz.py 2014-03-23 22:56:38 +08:00
Nguyen Anh Quynh
61b7a722c1 suite: add Sparc support 2014-03-10 15:44:48 +08:00
Nguyen Anh Quynh
0586a74bdd suite: minor fix for fuzz.py 2014-03-04 16:27:23 +08:00
Nguyen Anh Quynh
d9ee9b114f suite: more throughout fuzzing 2014-03-04 15:32:28 +08:00
Nguyen Anh Quynh
1cf70fe174 suite: minor fixes for fuzz.py 2014-03-04 14:23:41 +08:00