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Author SHA1 Message Date
Nguyen Anh Quynh
fce28ce159 x86: revert the old change that check prefix location more strictly 2015-04-03 00:10:31 +08:00
Nguyen Anh Quynh
85b194fcf8 Merge pull request #303 from bSr43/eflags-fix 
Same fix on the reduce table.
 2015-04-02 23:55:18 +08:00
Vincent Bénony
1f33733482 Same fix on the reduce table. 2015-04-02 17:34:25 +02:00
Nguyen Anh Quynh
865dd8fa45 Merge branch 'eflags-fix' of https://github.com/bSr43/capstone into t9 2015-04-02 23:00:00 +08:00
Nguyen Anh Quynh
4544ba1f02 cython: support cs_regs_access() API 2015-04-02 22:54:52 +08:00
Vincent Bénony
7b02b12399 Fix EFLAGS for the sar/sal/shr/shl instructions. 2015-04-02 16:29:52 +02:00
Nguyen Anh Quynh
58eb07355e x86: avoid duplicating registers returned by cs_regs_access(). also add *CX registers to regs_read[], regs_write[] for REP* instructions 2015-04-02 15:18:33 +08:00
Nguyen Anh Quynh
9239967dd7 x86: fix instruction 66f20f59ff reported by @maijin 2015-04-02 12:41:41 +08:00
Nguyen Anh Quynh
6a4d27706a x86: fix the pause instruction reported by @maijin in issue #298 2015-04-02 12:32:33 +08:00
Nguyen Anh Quynh
d505d6d461 x86: initialize cs_x86.{xop_cc, eflags} 2015-04-01 01:30:34 +08:00
Nguyen Anh Quynh
a9015396eb python: X86Op.avx_zero_mask should have c_bool type 2015-04-01 01:10:27 +08:00
Nguyen Anh Quynh
87d754dc3a Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-03-30 08:25:20 +08:00
Nguyen Anh Quynh
228ec96de5 x86: LEA instruction should not access the second operand. bug reported by @chaplja 2015-03-30 08:24:12 +08:00
Cr4sh
19ee2d10b3 inttypes.h fix 2015-03-29 21:16:38 +08:00
Nguyen Anh Quynh
3a99bc6977 tests: fix an warning on big left shifting. issue reported by Coverity 2015-03-27 00:51:47 +08:00
Nguyen Anh Quynh
076dc6f124 Merge branch 'newapi' into next 2015-03-26 00:40:57 +08:00
Nguyen Anh Quynh
475b9622d5 docs: add link to op_access.html 2015-03-26 00:40:44 +08:00
Nguyen Anh Quynh
95d4e9fd00 python: fix access info of test_x86.py (CS_AC_READ|CS_AC_WRITE) 2015-03-26 00:27:19 +08:00
Nguyen Anh Quynh
10647aef58 bindings: update java/ocaml/python after the latest changes in the core for the new API 2015-03-25 17:35:59 +08:00
Nguyen Anh Quynh
53ccc2cf38 bump CS_NEXT_VERSION up due to the newly added API cs_regs_access() 2015-03-25 15:23:58 +08:00
Nguyen Anh Quynh
19ba71a6ae Makefile: add X86MappingInsnOp_reduce.inc to DEP_X86 2015-03-25 15:22:12 +08:00
Nguyen Anh Quynh
a60c5954ce Merge pull request #295 from richo/python-setuptools 
python: Use setuptools instead of distutils to setup
 2015-03-25 15:13:55 +08:00
Nguyen Anh Quynh
efffe787d1 Add new API and start to provide access information for instruction operands 
- New API cs_regs_access() that provide registers being read & modified by instruction

- New field cs_x86_op.access provides access info (READ, WRITE) for each operand

- New field cs_x86.eflags provides EFLAGS affected by instruction

- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
 2015-03-25 15:02:13 +08:00
Nguyen Anh Quynh
bb171fa861 Merge branch 'next' into newapi 2015-03-23 21:48:26 +08:00
Richo Healey
3c862d5c11 python: Use setuptools if avilable 2015-03-22 23:05:58 -07:00
Nguyen Anh Quynh
7c3fd911ee arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr 2015-03-23 00:56:15 +08:00
Nguyen Anh Quynh
75e94a06c9 arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr 2015-03-23 00:56:03 +08:00
Nguyen Anh Quynh
b1a4af656c core: rename operand access symbols from CS_OP_* to CS_AC_* 2015-03-23 00:09:45 +08:00
Nguyen Anh Quynh
5e5b1f5366 core: rename operand access symbols from CS_OP_* to CS_AC_* 2015-03-23 00:09:20 +08:00
Nguyen Anh Quynh
6a77cc7463 arm: some fixes for insn_ops[] where some registers should be considered for accessing. issue reported by @derrek 2015-03-22 23:24:30 +08:00
Nguyen Anh Quynh
c79a8a03c4 arm: fix lots of issues with insn_op[], and move it to a separate file ARMMappingInsnOp.inc 2015-03-22 13:39:54 +08:00
Nguyen Anh Quynh
abd253a029 README: add Lua to the list of binding languages 2015-03-22 00:28:29 +08:00
Nguyen Anh Quynh
5b93f59afe x86: more fix for lots of OP_NOREG in insn_ops[]. also renamed it to OP_IGNORE 2015-03-21 01:35:14 +08:00
Nguyen Anh Quynh
1271684973 x86: print interrupt number of INT instruction in positive form. bug reported by @pancake 2015-03-20 22:36:08 +08:00
Nguyen Anh Quynh
8bb1f04bb8 x86: fix lots of issues with insn_op[], and move it to a separate file X86MappingInsnOp.inc 2015-03-20 17:18:01 +08:00
Nguyen Anh Quynh
88a95535d0 python: simplify setup.py 2015-03-19 16:57:47 +08:00
Nguyen Tan Cong
e830b75d94 python: properly build the core in Cygwin environment for setup.py 2015-03-19 16:09:38 +08:00
Mario Vilas
0950943392 Fixed #289 2015-03-18 07:43:53 +07:00
Nguyen Anh Quynh
85120cce23 bindings: add ARM64_GRP_CALL & ARM64_GRP_RET groups after the related change in the core 2015-03-16 23:53:59 +07:00
Nguyen Anh Quynh
f97067924c arm64: use symbol rather than constant (128) for calculating group name in AArch64_group_name() 2015-03-16 11:49:33 +07:00
Nguyen Anh Quynh
a6fb47bdf0 Merge branch 'AArch64Details' of https://github.com/DavidCallahan/capstone into test3 2015-03-16 11:43:50 +07:00
David Callahan
9092e5295f Change AArch64 GRP_JUMP to use a static table implementation 
Added support for GRP_CALL and GRP_RETURN to AArch64
 2015-03-15 18:01:48 -07:00
Nguyen Anh Quynh
2c1b7f1398 x86: fix Immediate operand size when first register operand is embedded in mnemonic (CMP8i8). bug reported by @joelpx 2015-03-14 10:17:17 +08:00
Nguyen Anh Quynh
197fe1c14c bindings: add {ARM|ARM6}GRP_PRIVILEGE 2015-03-12 18:18:24 +08:00
Nguyen Anh Quynh
21bf9cee90 Merge branch 'next' of https://github.com/aquynh/capstone into next 2015-03-12 18:17:24 +08:00
Nguyen Anh Quynh
681070ccf4 Merge pull request #279 from radare/arm64-priv 
add ARM64_GRP_PRIVILEGE group and tag some instructions
 2015-03-12 17:42:14 +08:00
Nguyen Anh Quynh
ba7bf10dbb Merge pull request #278 from radare/arm-priv 
add ARM_GRP_PRIVILEGE group and tag some instructions
 2015-03-12 17:41:52 +08:00
Nguyen Anh Quynh
cac770a0cb bindings: support QPX mode & QPX alias instructions 2015-03-12 17:03:33 +08:00
Nguyen Anh Quynh
b8ffb86b02 ppc: fix a bug in QPX mode & add some QPX alias instructions. 2015-03-12 16:52:31 +08:00
Nguyen Anh Quynh
0cc0543486 ppc: add missing groups to group_name_maps[]. bug reported by Coverity 2015-03-12 00:30:44 +08:00