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Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
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z b8fcf27b22 RISCV support ISRV32/ISRV64 (#1401) 
* Added RISCV dir to contain the RISCV architecture engine code. Adding the TableGen files generated from llvm-tblgen. Add Disassembler.h

* Started working on RISCVDisassembler.c - RISCV_init(), RISCVDisassembler_getInstruction, and RISCV_getInstruction

* Added all functions to RISCVDisassembler.c and needed modifications to RISCVGenDisassemblerTables.inc. Add and modified RISCVGenSubtargetInfo.inc. Start creation of RISCVInstPrinter.h

* Finished RISCVGenAsmWriter.inc. Finished RISCVGenRegisterInfo.inc. Minor fixes to RISCVDisassembler.c. Working on RISCVInstPrinter

* Finished RISCVInstPrinter, RISCVMapping, RISCVBaseInfo, RISCVGenInstrInfo.inc, RISCVModule.c. Working on riscv.h

* Backport it from: 0db412ce3b

* All RISCV files added. Compiled correctly and initial test for ADD, ADDI, AND works properly.

* Add refactored cs.c for RISCV

* Testing all I instructions in test_riscv.c

* Modify the orignal backport for RISCVGenRegisterInfo.inc, capstone.h and test_iter to work w/ the current code strcuture

* Fix issue with RISCVGenRegisterInfo.inc - RISCVRegDesc[] (Excess elements in struct initializer). Added RISCV tests to test_iter.c

* fixed bug related to incorrect initialization of memory after malloc

* fix compile bug

* Fix compile errors.

* move riscv.h to include/capstone

* fix indentation issues

* fix coding style issues

* Fix indentation issues

* fix coding style

* Move variable declaration to the top of the block

* Fix coding indentation

* Move some stuff into RISCVMappingInsn.inc

* Fix code sytle

* remove cs_mode support for RISCV

* update asmwriter-inc to LLVM upstream

* update the .inc files to riscv upstream

* update riscv disassembler function for suport 16bit instructions

* update printer & tablegen inc files which have fixed arguments mismatch

* update headers and mapping source

* add riscv architecture specific test code

* fix all RISCV tons of compiler errors

* pass final tests

* add riscv tablegen patchs

* merge with upstream/next

* fix cstool missing riscv file

* fix root Makefile

* add new TableGen patchs for riscv

* fix cmakefile.txt of missing one riscv file

* fix declaration conflict

* fix incompatible declaration type

* change riscvc from arch to mode

* fix test_riscv warnning

* fix code style and add riscv part of test_basic

* add RISCV64 mode

* add suite for riscv

* crack fuzz test

* fix getfeaturebits test add riscvc

* fix test missing const qualifier warnning

* fix testcase type mismatch

* fix return value missing

* change getfeaturebits test

* add test cs files

* using a winder type contain the decode string

* fix a copy typo

* remove useless mode for riscv

* change cs file blank type

* add repo for update_riscv & fix cstool missing riscv mode

* fix typo

* add riscv for cstool useage

* add TableGen patch for riscv asmwriter

* clean ctags file

* remove black comment line

* fix fuzz related something

* fix missing RISCV string of fuzz

* update readme, etc..

* add riscv *.s.cs file

* add riscv *.s.cs file & clear ctags

* clear useless array declarations at capstone_test

* update to 5e4069f

* update readme change name more formal

* change position of riscv after bpf and modify copyright more uniform

* clear useless ctags file

* change blank with tab in riscv.h

* add riscv python bindings

* add riscv in __init__.py

* fix riscv define value for python binding

* fix test_riscv.py typo

* add missing riscvc in __init__.py of python bindings

* fix alias-insn printer bug, remove useless newline

* change inst print delimter from tab to bankspace for travis

* add riscv tablegen patch

* fix inst output more consistency

* add TableGen patch which fix inst output formal

* crack the effective address output for detail and change register print function

* fix not detail crash bug

* change item declaration position at cs_riscv

* update riscv.py

* change function name more meaningfull

* update python binding makefile

* fix register enum sequence according to riscvgenreginfo.inc

* test function name

* add enum s0/fp in riscv.h & update riscv_const.py

* add register name enum
2019-03-09 08:41:12 +08:00
arch RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
bindings RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
contrib RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
cstool RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
docs add docs/capstone-logo.png 2018-12-31 16:29:00 +08:00
include RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
msvc merge next to master 2018-07-20 12:36:50 +08:00
packages merge next to master 2018-07-20 12:36:50 +08:00
suite RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
tests RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
windows provide a validity check to prevent against Integer overflow conditions (#870) 2017-03-13 23:35:29 +08:00
windowsce Added documentation for building for Windows CE. 2016-04-12 09:26:47 +02:00
xcode merge next to master 2018-07-20 12:36:50 +08:00
.appveyor.yml rename appveyor.yml to .appveyor.yml 2016-03-15 00:01:10 +08:00
.gitattributes Fix language statistics by considering *.inc files to be C files. (#1078) 2018-01-14 20:42:20 +08:00
.gitignore RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
.travis.yml add xenial tests (#1404) 2019-03-01 09:55:02 +08:00
capstone.pc.in fix include path in pkg-config template (#1276) 2018-10-23 19:42:01 -03:00
ChangeLog ChangeLog 2019-01-10 13:18:49 +08:00
cmake-x86.sh Add webassembly arch (#1359) 2019-02-01 23:03:47 +08:00
cmake.sh add cmake.sh 2019-02-03 14:38:51 +08:00
CMakeLists.txt RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
COMPILE_CMAKE.TXT New architecture: BPF (#1388) 2019-02-18 17:39:51 +08:00
COMPILE_MSVC.TXT Fix CAPSTONE_HAS_PPC flags (#1361) 2019-02-03 09:34:59 +08:00
COMPILE.TXT New architecture: BPF (#1388) 2019-02-18 17:39:51 +08:00
config.mk RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
CREDITS.TXT RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
cs_priv.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
cs.c RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
functions.mk Makefile: put common functions into functions.mk 2014-05-01 22:53:52 +08:00
HACK.TXT Adds corpus generation for bpf architecture (#1396) 2019-02-21 10:42:31 +08:00
LEB128.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
LICENSE_LLVM.TXT initial import 2013-11-27 12:11:31 +08:00
LICENSE.TXT a a newline to LICENSE.TXT 2014-02-20 17:08:28 +08:00
make.sh sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
Makefile RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
MathExtras.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCDisassembler.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCFixedLenDisassembler.h RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
MCInst.c sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCInst.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCInstrDesc.c sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCInstrDesc.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCRegisterInfo.c sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
MCRegisterInfo.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
nmake-x86.bat Add webassembly arch (#1359) 2019-02-01 23:03:47 +08:00
nmake.bat Add webassembly arch (#1359) 2019-02-01 23:03:47 +08:00
pkgconfig.mk next version = 5.0 2019-01-09 13:53:17 +08:00
README.md RISCV support ISRV32/ISRV64 (#1401) 2019-03-09 08:41:12 +08:00
RELEASE_NOTES empty RELEASE_NOTES for v4.1 2018-12-19 07:50:18 +07:00
SPONSORS.TXT Add webassembly arch (#1359) 2019-02-01 23:03:47 +08:00
SStream.c sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
SStream.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00
TODO TODO 2015-03-11 11:33:00 +08:00
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utils.h sync with LLVM 7.0.1. X86 is first 2019-02-26 15:19:51 +08:00

README.md

Capstone Engine

Build Status Build status pypi package pypi downloads

Capstone is a disassembly framework with the target of becoming the ultimate disasm engine for binary analysis and reversing in the security community.

Created by Nguyen Anh Quynh, then developed and maintained by a small community, Capstone offers some unparalleled features:

  • Support multiple hardware architectures: ARM, ARM64 (ARMv8), BPF, Ethereum VM, Webassembly, M68K, Mips, MOS65XX, PPC, Sparc, SystemZ, TMS320C64X, M680X, XCore, RISC-V(rv32G/rv64G) and X86 (including X86_64).

  • Having clean/simple/lightweight/intuitive architecture-neutral API.

  • Provide details on disassembled instruction (called “decomposer” by others).

  • Provide semantics of the disassembled instruction, such as list of implicit registers read & written.

  • Implemented in pure C language, with lightweight bindings for D, Clojure, F#, Common Lisp, Visual Basic, PHP, PowerShell, Emacs, Haskell, Perl, Python, Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua, Rust, Delphi, Free Pascal & Vala ready either in main code, or provided externally by the community).

  • Native support for all popular platforms: Windows, Mac OSX, iOS, Android, Linux, *BSD, Solaris, etc.

  • Thread-safe by design.

  • Special support for embedding into firmware or OS kernel.

  • High performance & suitable for malware analysis (capable of handling various X86 malware tricks).

  • Distributed under the open source BSD license.

Further information is available at http://www.capstone-engine.org

Compile

See COMPILE.TXT file for how to compile and install Capstone.

Documentation

See docs/README for how to customize & program your own tools with Capstone.

Hack

See HACK.TXT file for the structure of the source code.

License

This project is released under the BSD license. If you redistribute the binary or source code of Capstone, please attach file LICENSE.TXT with your products.