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Generation code cleanups & add generated headers
Delete instead of commenting out
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@ -1140,7 +1140,7 @@ void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
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o << "tmp |= ";
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else
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o << "tmp = ";
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o << "fieldFromInstruction(insn, " << EF.Base << ", " << EF.Width << ')';
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o << "fieldname(insn, " << EF.Base << ", " << EF.Width << ')';
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if (UseInsertBits)
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o << " << " << EF.Offset;
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else if (EF.Offset != 0)
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@ -2212,27 +2212,6 @@ static void emitFieldFromInstruction(formatted_raw_ostream &OS) {
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"}\n\n";
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}
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// emitInsertBits - Emit the templated helper function insertBits().
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static void emitInsertBits(formatted_raw_ostream &OS) {
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OS << "// Helper function for inserting bits extracted from an encoded "
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"instruction into\n"
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<< "// a field.\n"
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<< "template <typename InsnType>\n"
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<< "static std::enable_if_t<std::is_integral<InsnType>::value>\n"
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<< "insertBits(InsnType &field, InsnType bits, unsigned startBit, "
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"unsigned numBits) {\n"
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<< " assert(startBit + numBits <= sizeof field * 8);\n"
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<< " field |= (InsnType)bits << startBit;\n"
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<< "}\n"
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<< "\n"
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<< "template <typename InsnType>\n"
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<< "static std::enable_if_t<!std::is_integral<InsnType>::value>\n"
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<< "insertBits(InsnType &field, uint64_t bits, unsigned startBit, "
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"unsigned numBits) {\n"
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<< " field.insertBits(bits, startBit, numBits);\n"
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<< "}\n\n";
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}
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// emitDecodeInstruction - Emit the templated helper function
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// decodeInstruction().
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static void emitDecodeInstruction(formatted_raw_ostream &OS) {
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@ -2516,7 +2495,14 @@ void CapstoneGenInfo::emitRecord(
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// Emits disassembler code for instruction decoding.
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void CapstoneGenInfo::run(raw_ostream &o) {
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formatted_raw_ostream OS(o);
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OS << "/* Capstone Disassembly Engine, http://www.capstone-engine.org */\n"
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<< "/* By Phosphorus15 <phosphorus15@foxmail.com>, Year 2021 */\n"
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<< "/* This generator is under https://github.com/rizinorg/llvm-capstone "
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"*/\n"
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<< "/* Automatically generated file, do not edit! */\n\n";
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OS << "#include \"../../MCInst.h\"\n";
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OS << "#include \"../../LEB128.h\"\n";
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OS << "\n\n";
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@ -2704,22 +2690,6 @@ void CapstoneGenInfo::run(raw_ostream &o) {
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// Keep track of all of the def lists we have emitted already.
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std::map<std::vector<Record *>, unsigned> EmittedLists;
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unsigned ListNumber = 0;
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//
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// // Emit all of the instruction's implicit uses and defs.
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// for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) {
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// Record *Inst = II->TheDef;
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// std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
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// if (!Uses.empty()) {
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// unsigned &IL = EmittedLists[Uses];
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// if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS);
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// }
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// std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs");
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// if (!Defs.empty()) {
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// unsigned &IL = EmittedLists[Defs];
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// if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS);
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// }
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// }
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OperandInfoMapTy OperandInfoIDs;
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@ -33,10 +33,6 @@ static DiffVec &diffEncode(DiffVec &V, unsigned InitVal, Iter Begin, Iter End) {
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static void printDiff16(raw_ostream &OS, uint16_t Val) { OS << Val; }
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static void printMask(raw_ostream &OS, LaneBitmask Val) {
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OS << "LaneBitmask(0x" << PrintLaneMask(Val) << ')';
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}
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static void printSubRegIndex(raw_ostream &OS, const CodeGenSubRegIndex *Idx) {
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OS << Idx->EnumValue;
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}
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@ -277,9 +273,6 @@ void CapstoneGenInfo::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
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for (const auto &RC : RegisterClasses) {
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assert(isInt<8>(RC.CopyCost) && "Copy cost too large.");
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uint32_t RegSize = 0;
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if (RC.RSI.isSimple())
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RegSize = RC.RSI.getSimple().RegSize;
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OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, "
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<< "sizeof(" << RC.getName() << "Bits)"
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<< " },\n";
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@ -1325,38 +1325,6 @@ AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target,
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RecordKeeper &records)
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: Records(records), AsmParser(asmParser), Target(target) {}
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/// buildOperandMatchInfo - Build the necessary information to handle user
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/// defined operand parsing methods.
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void AsmMatcherInfo::buildOperandMatchInfo() {
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/// Map containing a mask with all operands indices that can be found for
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/// that class inside a instruction.
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typedef std::map<ClassInfo *, unsigned, deref<std::less<>>> OpClassMaskTy;
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OpClassMaskTy OpClassMask;
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for (const auto &MI : Matchables) {
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OpClassMask.clear();
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// Keep track of all operands of this instructions which belong to the
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// same class.
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for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
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const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
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if (Op.Class->ParserMethod.empty())
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continue;
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unsigned &OperandMask = OpClassMask[Op.Class];
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OperandMask |= (1 << i);
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}
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// Generate operand match info for each mnemonic/operand class pair.
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for (const auto &OCM : OpClassMask) {
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unsigned OpMask = OCM.second;
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ClassInfo *CI = OCM.first;
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OperandMatchInfo.push_back(
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OperandMatchEntry::create(MI.get(), CI, OpMask));
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}
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}
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}
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void AsmMatcherInfo::buildInfo() {
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// Build information about all of the AssemblerPredicates.
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const std::vector<std::pair<Record *, SubtargetFeatureInfo>>
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@ -1881,8 +1849,9 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target,
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OS << "};\n\n\n\n";
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}
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OS << "typedef enum " << Target.getInstNamespace().lower() << "_insn {\n"
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" "
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OS << "typedef enum " << Target.getInstNamespace().lower()
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<< "_insn {\n"
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" "
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<< Target.getInstNamespace().upper() << "_INS_INVALID = 0";
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for (auto Mnemonic : InstructClass) {
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OS << ",\n " << Mnemonic;
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@ -1893,7 +1862,6 @@ void emitInstrMatchTable(raw_ostream &OS, CodeGenTarget &Target,
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void CapstoneGenMapper::run(raw_ostream &O) {
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CodeGenTarget Target(Records);
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Record *AsmParser = Target.getAsmParser();
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StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName");
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AsmMatcherInfo Info(AsmParser, Target, Records);
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Info.buildInfo();
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@ -7,8 +7,6 @@
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#include "../Types.h"
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#include <llvm/Support/FormatVariadic.h>
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std::string extractTemplate(std::string &Printer, std::string Op = "") {
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if (Printer.find('<') != std::string::npos) {
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size_t End = Printer.find('>');
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@ -68,8 +66,8 @@ std::string getCode(const AsmWriterOperand &Op, bool PassSubtarget) {
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// quite a lot consequences!
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//
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// consequences
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// if (Op.Str.find("printUImm") != std::string::npos)
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// StrBase = "printUnsignedImm";
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// if (Op.Str.find("printUImm") != std::string::npos)
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// StrBase = "printUnsignedImm";
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auto Comment = std::string("/* ") + StrBase + " (+ " + Op.MiModifier + ") */";
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@ -333,7 +331,6 @@ void CapstoneGenInfo::EmitGetMnemonic(
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std::vector<std::vector<std::string>> &TableDrivenOperandPrinters,
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unsigned &BitsLeft, unsigned &AsmStrBits) {
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Record *AsmWriter = Target.getAsmWriter();
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StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
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O << "typedef struct MCMnemonic {\n"
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@ -503,7 +500,6 @@ void CapstoneGenInfo::EmitPrintInstruction(
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unsigned &BitsLeft, unsigned &AsmStrBits) {
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const unsigned OpcodeInfoBits = 64;
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Record *AsmWriter = Target.getAsmWriter();
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StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
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O << "/// printInstruction - This method is automatically generated by "
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@ -643,8 +639,6 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
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}
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void CapstoneGenInfo::EmitGetRegisterName(raw_ostream &O) {
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Record *AsmWriter = Target.getAsmWriter();
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StringRef ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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const auto &Registers = Target.getRegBank().getRegisters();
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const std::vector<Record *> &AltNameIndices = Target.getRegAltNameIndices();
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bool hasAltNames = AltNameIndices.size() > 1;
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@ -1273,8 +1267,8 @@ void CapstoneGenInfo::EmitPrintAliasInstruction(raw_ostream &O) {
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std::string BaseStr = PrintMethods[i].first;
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O << "// " << BaseStr << "\n";
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// this turns out to be harmful - don't use !
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// if (BaseStr.find("printUImm") != std::string::npos)
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// BaseStr = "printUnsignedImm";
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// if (BaseStr.find("printUImm") != std::string::npos)
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// BaseStr = "printUnsignedImm";
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std::string Template = extractTemplate(BaseStr);
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O << " case " << i << ":\n"
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<< " " << BaseStr << "(MI, "
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